summaryrefslogtreecommitdiff
path: root/baseboard
diff options
context:
space:
mode:
authorRob Barnes <robbarnes@google.com>2021-04-14 08:38:24 -0600
committerCommit Bot <commit-bot@chromium.org>2021-04-14 16:23:01 +0000
commita5ee228429d78839426ee17727756ad078a76e9f (patch)
tree89d54d0ccf226d67634085077315542b030b1ecf /baseboard
parent9202b35704bf5f218641163ed63764e1eac02637 (diff)
downloadchrome-ec-a5ee228429d78839426ee17727756ad078a76e9f.tar.gz
guybrush: Assert EN_PPVAR_BJ_ADP_L by default
EN_PPVAR_BJ_ADP_L must default active to ensure we can power on when the barrel jack is connected. BUG=b:185308258 TEST=Build BRANCH=None Signed-off-by: Rob Barnes <robbarnes@google.com> Change-Id: I8aaf63282d525539625137f9ebe8c51f2d4b96c9 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2825481 Reviewed-by: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'baseboard')
-rw-r--r--baseboard/mancomb/base_gpio.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/baseboard/mancomb/base_gpio.inc b/baseboard/mancomb/base_gpio.inc
index b70eb19663..04ed32d3f8 100644
--- a/baseboard/mancomb/base_gpio.inc
+++ b/baseboard/mancomb/base_gpio.inc
@@ -29,7 +29,7 @@ GPIO(EC_RECOVERY_BTN_ODL, PIN(3, 1), GPIO_INT_BOTH)
GPIO(EN_PWR_S5, PIN(B, 7), GPIO_OUT_LOW) /* Enable S5 Power */
GPIO(EN_PWR_S0_R, PIN(F, 1), GPIO_OUT_LOW)
GPIO(EN_PWR_PCORE_S0_R, PIN(E, 1), GPIO_OUT_LOW)
-GPIO(EN_PPVAR_BJ_ADP_L, PIN(2, 1), GPIO_OUT_HIGH) /* Enable Barrel Jack Adapter Power */
+GPIO(EN_PPVAR_BJ_ADP_L, PIN(2, 1), GPIO_OUT_LOW) /* Enable Barrel Jack Adapter Power */
GPIO(EN_USM_ODL, PIN(1, 2), GPIO_ODR_HIGH) /* Enable ultrasonic mode */
ALTERNATE(/*MECH_PWR_BTN_ODL*/ PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) /* PSL - Mechanical Power Button */