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authorEdward Hill <ecgh@chromium.org>2018-05-22 14:48:10 -0600
committerchrome-bot <chrome-bot@chromium.org>2018-05-25 20:31:49 -0700
commit4ab9fc9fa9a0a246bc78eb70d301457abe8dc79b (patch)
treee39688cdb8e1d2f8ce69a0f86d0af5bad8014155 /baseboard
parent1d2c13a1630a1a6222411e1c03186cb9b1f576e0 (diff)
downloadchrome-ec-4ab9fc9fa9a0a246bc78eb70d301457abe8dc79b.tar.gz
grunt: Move common code to baseboard
Move code that will be common to Grunt and Careena to baseboard to avoid duplication when creating the Careena board. Add Careena board files. These are currently just a copy of Grunt and will be modified for Careena next. BUG=b:79704826 BRANCH=none TEST=Grunt still boots ok. Change-Id: I6dd0035bdd62e92a7f3664120fc6ac3f23a0af4d Signed-off-by: Edward Hill <ecgh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1070988
Diffstat (limited to 'baseboard')
-rw-r--r--baseboard/grunt/baseboard.c477
-rw-r--r--baseboard/grunt/baseboard.h208
-rw-r--r--baseboard/grunt/battery.c126
-rw-r--r--baseboard/grunt/build.mk11
-rw-r--r--baseboard/grunt/usb_pd_policy.c446
5 files changed, 1268 insertions, 0 deletions
diff --git a/baseboard/grunt/baseboard.c b/baseboard/grunt/baseboard.c
new file mode 100644
index 0000000000..8bd2232cb9
--- /dev/null
+++ b/baseboard/grunt/baseboard.c
@@ -0,0 +1,477 @@
+/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Grunt family-specific configuration */
+
+#include "adc.h"
+#include "adc_chip.h"
+#include "button.h"
+#include "charge_manager.h"
+#include "charge_state.h"
+#include "charge_state_v2.h"
+#include "common.h"
+#include "compile_time_macros.h"
+#include "console.h"
+#include "driver/accel_kionix.h"
+#include "driver/accel_kx022.h"
+#include "driver/accelgyro_bmi160.h"
+#include "driver/bc12/bq24392.h"
+#include "driver/led/lm3630a.h"
+#include "driver/ppc/sn5s330.h"
+#include "driver/tcpm/anx74xx.h"
+#include "driver/tcpm/ps8xxx.h"
+#include "driver/temp_sensor/sb_tsi.h"
+#include "ec_commands.h"
+#include "extpower.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "i2c.h"
+#include "keyboard_scan.h"
+#include "lid_switch.h"
+#include "motion_sense.h"
+#include "power.h"
+#include "power_button.h"
+#include "pwm.h"
+#include "pwm_chip.h"
+#include "registers.h"
+#include "switch.h"
+#include "system.h"
+#include "task.h"
+#include "tcpci.h"
+#include "temp_sensor.h"
+#include "thermistor.h"
+#include "usb_mux.h"
+#include "usb_pd_tcpm.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+const enum gpio_signal hibernate_wake_pins[] = {
+ GPIO_LID_OPEN,
+ GPIO_AC_PRESENT,
+ GPIO_POWER_BUTTON_L,
+};
+const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
+
+const struct adc_t adc_channels[] = {
+ [ADC_TEMP_SENSOR_CHARGER] = {
+ "CHARGER", NPCX_ADC_CH0, ADC_MAX_VOLT, ADC_READ_MAX+1, 0
+ },
+ [ADC_TEMP_SENSOR_SOC] = {
+ "SOC", NPCX_ADC_CH1, ADC_MAX_VOLT, ADC_READ_MAX+1, 0
+ },
+ [ADC_VBUS] = {
+ "VBUS", NPCX_ADC_CH8, ADC_MAX_VOLT*10, ADC_READ_MAX+1, 0
+ },
+ [ADC_SKU_ID1] = {
+ "SKU1", NPCX_ADC_CH9, ADC_MAX_VOLT, ADC_READ_MAX+1, 0
+ },
+ [ADC_SKU_ID2] = {
+ "SKU2", NPCX_ADC_CH4, ADC_MAX_VOLT, ADC_READ_MAX+1, 0
+ },
+};
+BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
+
+/* Power signal list. Must match order of enum power_signal. */
+const struct power_signal_info power_signal_list[] = {
+ {GPIO_PCH_SLP_S3_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S3_DEASSERTED"},
+ {GPIO_PCH_SLP_S5_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S5_DEASSERTED"},
+ {GPIO_S0_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, "S0_PGOOD"},
+ {GPIO_S5_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, "S5_PGOOD"},
+};
+BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
+
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = {
+ [USB_PD_PORT_ANX74XX] = {
+ .i2c_host_port = I2C_PORT_TCPC0,
+ .i2c_slave_addr = ANX74XX_I2C_ADDR1,
+ .drv = &anx74xx_tcpm_drv,
+ .pol = TCPC_ALERT_ACTIVE_LOW,
+ },
+ [USB_PD_PORT_PS8751] = {
+ .i2c_host_port = I2C_PORT_TCPC1,
+ .i2c_slave_addr = PS8751_I2C_ADDR1,
+ .drv = &ps8xxx_tcpm_drv,
+ .pol = TCPC_ALERT_ACTIVE_LOW,
+ },
+};
+
+struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = {
+ [USB_PD_PORT_ANX74XX] = {
+ .port_addr = USB_PD_PORT_ANX74XX,
+ .driver = &anx74xx_tcpm_usb_mux_driver,
+ .hpd_update = &anx74xx_tcpc_update_hpd_status,
+ },
+ [USB_PD_PORT_PS8751] = {
+ .port_addr = USB_PD_PORT_PS8751,
+ .driver = &tcpci_tcpm_usb_mux_driver,
+ .hpd_update = &ps8xxx_tcpc_update_hpd_status,
+ /* TODO(ecgh): ps8751_tune_mux needed? */
+ }
+};
+
+struct ppc_config_t ppc_chips[] = {
+ {
+ .i2c_port = I2C_PORT_TCPC0,
+ .i2c_addr = SN5S330_ADDR0,
+ .drv = &sn5s330_drv
+ },
+ {
+ .i2c_port = I2C_PORT_TCPC1,
+ .i2c_addr = SN5S330_ADDR0,
+ .drv = &sn5s330_drv
+ },
+};
+unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+
+/* BC 1.2 chip Configuration */
+const struct bq24392_config_t bq24392_config[CONFIG_USB_PD_PORT_COUNT] = {
+ [USB_PD_PORT_ANX74XX] = {
+ .chip_enable_pin = GPIO_USB_C0_BC12_VBUS_ON_L_V2,
+ .chg_det_pin = GPIO_USB_C0_BC12_CHG_DET,
+ .flags = BQ24392_FLAGS_ENABLE_ACTIVE_LOW,
+ },
+ [USB_PD_PORT_PS8751] = {
+ .chip_enable_pin = GPIO_USB_C1_BC12_VBUS_ON_L,
+ .chg_det_pin = GPIO_USB_C1_BC12_CHG_DET,
+ .flags = BQ24392_FLAGS_ENABLE_ACTIVE_LOW,
+ },
+};
+
+const int usb_port_enable[USB_PORT_COUNT] = {
+ GPIO_EN_USB_A0_5V,
+ GPIO_EN_USB_A1_5V,
+};
+
+static void baseboard_chipset_suspend(void)
+{
+ /*
+ * Turn off display backlight. This ensures that the backlight stays off
+ * in S3, no matter what the AP has it set to. The AP also controls it.
+ * This is here more for legacy reasons.
+ */
+ gpio_set_level(GPIO_ENABLE_BACKLIGHT_L, 1);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, baseboard_chipset_suspend,
+ HOOK_PRIO_DEFAULT);
+
+static void baseboard_chipset_resume(void)
+{
+ /* Allow display backlight to turn on. See above backlight comment */
+ gpio_set_level(GPIO_ENABLE_BACKLIGHT_L, 0);
+
+}
+DECLARE_HOOK(HOOK_CHIPSET_RESUME, baseboard_chipset_resume, HOOK_PRIO_DEFAULT);
+
+static void baseboard_chipset_startup(void)
+{
+ /*
+ * Enable sensor power (lid accel, gyro) in S3 for calculating the lid
+ * angle (needed on convertibles to disable resume from keyboard in
+ * tablet mode).
+ */
+ gpio_set_level(GPIO_EN_PP1800_SENSOR, 1);
+}
+DECLARE_HOOK(HOOK_CHIPSET_STARTUP, baseboard_chipset_startup,
+ HOOK_PRIO_DEFAULT);
+
+static void baseboard_chipset_shutdown(void)
+{
+ /* Disable sensor power (lid accel, gyro) in S5. */
+ gpio_set_level(GPIO_EN_PP1800_SENSOR, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, baseboard_chipset_shutdown,
+ HOOK_PRIO_DEFAULT);
+
+int board_set_active_charge_port(int port)
+{
+ int i;
+
+ CPRINTS("New chg p%d", port);
+
+ if (port == CHARGE_PORT_NONE) {
+ /* Disable all ports. */
+ for (i = 0; i < ppc_cnt; i++) {
+ if (ppc_vbus_sink_enable(i, 0))
+ CPRINTS("p%d: sink disable failed.", i);
+ }
+
+ return EC_SUCCESS;
+ }
+
+ /* Check if the port is sourcing VBUS. */
+ if (ppc_is_sourcing_vbus(port)) {
+ CPRINTF("Skip enable p%d", port);
+ return EC_ERROR_INVAL;
+ }
+
+ /*
+ * Turn off the other ports' sink path FETs, before enabling the
+ * requested charge port.
+ */
+ for (i = 0; i < ppc_cnt; i++) {
+ if (i == port)
+ continue;
+
+ if (ppc_vbus_sink_enable(i, 0))
+ CPRINTS("p%d: sink disable failed.", i);
+ }
+
+ /* Enable requested charge port. */
+ if (ppc_vbus_sink_enable(port, 1)) {
+ CPRINTS("p%d: sink enable failed.");
+ return EC_ERROR_UNKNOWN;
+ }
+
+ return EC_SUCCESS;
+}
+
+void board_set_charge_limit(int port, int supplier, int charge_ma,
+ int max_ma, int charge_mv)
+{
+ charge_set_input_current_limit(MAX(charge_ma,
+ CONFIG_CHARGER_INPUT_CURRENT),
+ charge_mv);
+}
+
+/* Keyboard scan setting */
+struct keyboard_scan_config keyscan_config = {
+ /* Extra delay when KSO2 is tied to Cr50. */
+ .output_settle_us = 60,
+ .debounce_down_us = 6 * MSEC,
+ .debounce_up_us = 30 * MSEC,
+ .scan_period_us = 1500,
+ .min_post_scan_delay_us = 1000,
+ .poll_timeout_us = SECOND,
+ .actual_key_mask = {
+ 0x3c, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
+ 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */
+ },
+};
+
+/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
+const struct pwm_t pwm_channels[] = {
+ [PWM_CH_KBLIGHT] = { 5, 0, 100 },
+ [PWM_CH_LED1_AMBER] = {
+ 0, PWM_CONFIG_OPEN_DRAIN | PWM_CONFIG_ACTIVE_LOW |
+ PWM_CONFIG_DSLEEP, 100
+ },
+ [PWM_CH_LED2_BLUE] = {
+ 2, PWM_CONFIG_OPEN_DRAIN | PWM_CONFIG_ACTIVE_LOW |
+ PWM_CONFIG_DSLEEP, 100
+ },
+};
+BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
+
+/*
+ * We use 11 as the scaling factor so that the maximum mV value below (2761)
+ * can be compressed to fit in a uint8_t.
+ */
+#define THERMISTOR_SCALING_FACTOR 11
+
+/*
+ * Values are calculated from the "Resistance VS. Temperature" table on the
+ * Murata page for part NCP15WB473F03RC. Vdd=3.3V, R=30.9Kohm.
+ */
+static const struct thermistor_data_pair thermistor_data[] = {
+ { 2761 / THERMISTOR_SCALING_FACTOR, 0},
+ { 2492 / THERMISTOR_SCALING_FACTOR, 10},
+ { 2167 / THERMISTOR_SCALING_FACTOR, 20},
+ { 1812 / THERMISTOR_SCALING_FACTOR, 30},
+ { 1462 / THERMISTOR_SCALING_FACTOR, 40},
+ { 1146 / THERMISTOR_SCALING_FACTOR, 50},
+ { 878 / THERMISTOR_SCALING_FACTOR, 60},
+ { 665 / THERMISTOR_SCALING_FACTOR, 70},
+ { 500 / THERMISTOR_SCALING_FACTOR, 80},
+ { 434 / THERMISTOR_SCALING_FACTOR, 85},
+ { 376 / THERMISTOR_SCALING_FACTOR, 90},
+ { 326 / THERMISTOR_SCALING_FACTOR, 95},
+ { 283 / THERMISTOR_SCALING_FACTOR, 100}
+};
+
+static const struct thermistor_info thermistor_info = {
+ .scaling_factor = THERMISTOR_SCALING_FACTOR,
+ .num_pairs = ARRAY_SIZE(thermistor_data),
+ .data = thermistor_data,
+};
+
+static int board_get_temp(int idx, int *temp_k)
+{
+ /* idx is the sensor index set below in temp_sensors[] */
+ int mv = adc_read_channel(
+ idx ? ADC_TEMP_SENSOR_SOC : ADC_TEMP_SENSOR_CHARGER);
+ int temp_c;
+
+ if (mv < 0)
+ return -1;
+
+ temp_c = thermistor_linear_interpolate(mv, &thermistor_info);
+ *temp_k = C_TO_K(temp_c);
+ return 0;
+}
+
+const struct temp_sensor_t temp_sensors[] = {
+ {"Charger", TEMP_SENSOR_TYPE_BOARD, board_get_temp, 0, 1},
+ {"SOC", TEMP_SENSOR_TYPE_BOARD, board_get_temp, 1, 5},
+ {"CPU", TEMP_SENSOR_TYPE_CPU, sb_tsi_get_val, 0, 4},
+};
+BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
+
+/* Motion sensors */
+static struct mutex g_lid_mutex;
+static struct mutex g_base_mutex;
+
+/*
+ * Matrix to rotate accelerator into standard reference frame
+ *
+ * TODO(teravest): Update this when we can physically test a Grunt.
+ */
+const matrix_3x3_t base_standard_ref = {
+ { 0, FLOAT_TO_FP(-1), 0},
+ { FLOAT_TO_FP(1), 0, 0},
+ { 0, 0, FLOAT_TO_FP(1)}
+};
+
+/* sensor private data */
+static struct kionix_accel_data g_kx022_data;
+static struct bmi160_drv_data_t g_bmi160_data;
+
+struct motion_sensor_t motion_sensors[] = {
+ [LID_ACCEL] = {
+ .name = "Lid Accel",
+ .active_mask = SENSOR_ACTIVE_S0_S3,
+ .chip = MOTIONSENSE_CHIP_KX022,
+ .type = MOTIONSENSE_TYPE_ACCEL,
+ .location = MOTIONSENSE_LOC_LID,
+ .drv = &kionix_accel_drv,
+ .mutex = &g_lid_mutex,
+ .drv_data = &g_kx022_data,
+ .port = I2C_PORT_SENSOR,
+ .addr = KX022_ADDR1,
+ .rot_standard_ref = NULL, /* Identity matrix. */
+ .default_range = 2, /* g, enough for laptop. */
+ .min_frequency = KX022_ACCEL_MIN_FREQ,
+ .max_frequency = KX022_ACCEL_MAX_FREQ,
+ .config = {
+ /* EC use accel for angle detection */
+ [SENSOR_CONFIG_EC_S3] = {
+ .odr = 10000 | ROUND_UP_FLAG,
+ },
+ },
+ },
+
+ [BASE_ACCEL] = {
+ .name = "Base Accel",
+ .active_mask = SENSOR_ACTIVE_S0_S3,
+ .chip = MOTIONSENSE_CHIP_BMI160,
+ .type = MOTIONSENSE_TYPE_ACCEL,
+ .location = MOTIONSENSE_LOC_BASE,
+ .drv = &bmi160_drv,
+ .mutex = &g_base_mutex,
+ .drv_data = &g_bmi160_data,
+ .port = I2C_PORT_SENSOR,
+ .addr = BMI160_ADDR0,
+ .default_range = 2, /* g, enough for laptop */
+ .rot_standard_ref = &base_standard_ref,
+ .min_frequency = BMI160_ACCEL_MIN_FREQ,
+ .max_frequency = BMI160_ACCEL_MAX_FREQ,
+ .config = {
+ /* EC use accel for angle detection */
+ [SENSOR_CONFIG_EC_S0] = {
+ .odr = 10000 | ROUND_UP_FLAG,
+ .ec_rate = 100,
+ },
+ /* EC use accel for angle detection */
+ [SENSOR_CONFIG_EC_S3] = {
+ .odr = 10000 | ROUND_UP_FLAG,
+ },
+ },
+ },
+
+ [BASE_GYRO] = {
+ .name = "Base Gyro",
+ .active_mask = SENSOR_ACTIVE_S0_S3,
+ .chip = MOTIONSENSE_CHIP_BMI160,
+ .type = MOTIONSENSE_TYPE_GYRO,
+ .location = MOTIONSENSE_LOC_BASE,
+ .drv = &bmi160_drv,
+ .mutex = &g_base_mutex,
+ .drv_data = &g_bmi160_data,
+ .port = I2C_PORT_SENSOR,
+ .addr = BMI160_ADDR0,
+ .default_range = 1000, /* dps */
+ .rot_standard_ref = &base_standard_ref,
+ .min_frequency = BMI160_GYRO_MIN_FREQ,
+ .max_frequency = BMI160_GYRO_MAX_FREQ,
+ },
+};
+
+const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);
+
+#ifndef TEST_BUILD
+void lid_angle_peripheral_enable(int enable)
+{
+ keyboard_scan_enable(enable, KB_SCAN_DISABLE_LID_ANGLE);
+}
+#endif
+
+static const int sku_thresh_mv[] = {
+ /* Vin = 3.3V, Ideal voltage, R2 values listed below */
+ /* R1 = 51.1 kOhm */
+ 200, /* 124 mV, 2.0 Kohm */
+ 366, /* 278 mV, 4.7 Kohm */
+ 550, /* 456 mV, 8.2 Kohm */
+ 752, /* 644 mV, 12.4 Kohm */
+ 927, /* 860 mV, 18.0 Kohm */
+ 1073, /* 993 mV, 22.0 Kohm */
+ 1235, /* 1152 mV, 27.4 Kohm */
+ 1386, /* 1318 mV, 34.0 Kohm */
+ 1552, /* 1453 mV, 40.2 Kohm */
+ /* R1 = 10.0 kOhm */
+ 1739, /* 1650 mV, 10.0 Kohm */
+ 1976, /* 1827 mV, 12.4 Kohm */
+ 2197, /* 2121 mV, 18.0 Kohm */
+ 2344, /* 2269 mV, 22.0 Kohm */
+ 2484, /* 2418 mV, 27.4 Kohm */
+ 2636, /* 2550 mV, 34.0 Kohm */
+ 2823, /* 2721 mV, 47.0 Kohm */
+};
+
+static int board_read_sku_adc(enum adc_channel chan)
+{
+ int mv;
+ int i;
+
+ mv = adc_read_channel(chan);
+
+ if (mv == ADC_READ_ERROR)
+ return -1;
+
+ for (i = 0; i < ARRAY_SIZE(sku_thresh_mv); i++)
+ if (mv < sku_thresh_mv[i])
+ return i;
+
+ return -1;
+}
+
+uint32_t system_get_sku_id(void)
+{
+ static uint32_t sku_id = -1;
+ int sku_id1, sku_id2;
+
+ if (sku_id != -1)
+ return sku_id;
+
+ sku_id1 = board_read_sku_adc(ADC_SKU_ID1);
+ sku_id2 = board_read_sku_adc(ADC_SKU_ID2);
+
+ if (sku_id1 < 0 || sku_id2 < 0)
+ return 0;
+
+ sku_id = (sku_id2 << 4) | sku_id1;
+ return sku_id;
+}
diff --git a/baseboard/grunt/baseboard.h b/baseboard/grunt/baseboard.h
new file mode 100644
index 0000000000..9ee1e8ca67
--- /dev/null
+++ b/baseboard/grunt/baseboard.h
@@ -0,0 +1,208 @@
+/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Grunt family-specific configuration */
+
+#ifndef __CROS_EC_BASEBOARD_H
+#define __CROS_EC_BASEBOARD_H
+
+/* NPCX7 config */
+#define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */
+#define NPCX_TACH_SEL2 0 /* No tach. */
+#define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */
+
+/* Internal SPI flash on NPCX7 */
+/* Flash is 1MB but reserve half for future use. */
+#define CONFIG_FLASH_SIZE (512 * 1024)
+#define CONFIG_SPI_FLASH_REGS
+#define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */
+
+/*
+ * Enable 1 slot of secure temporary storage to support
+ * suspend/resume with read/write memory training.
+ */
+#define CONFIG_VSTORE
+#define CONFIG_VSTORE_SLOT_COUNT 1
+
+#define CONFIG_ADC
+#define CONFIG_BACKLIGHT_LID
+#define CONFIG_BACKLIGHT_LID_ACTIVE_LOW
+#define CONFIG_BOARD_VERSION_GPIO
+#define CONFIG_HIBERNATE_PSL
+#define CONFIG_HOSTCMD_LPC
+#define CONFIG_HOSTCMD_SKUID
+#define CONFIG_I2C
+#define CONFIG_I2C_MASTER
+#define CONFIG_PWM
+#define CONFIG_PWM_KBLIGHT
+#define CONFIG_TEMP_SENSOR
+#define CONFIG_THERMISTOR_NCP15WB
+#define CONFIG_VBOOT_HASH
+#define CONFIG_VOLUME_BUTTONS
+
+#define CONFIG_BATTERY_CUT_OFF
+#define CONFIG_BATTERY_HW_PRESENT_CUSTOM
+#define CONFIG_BATTERY_PRESENT_CUSTOM
+#define CONFIG_BATTERY_SMART
+
+#define CONFIG_BC12_DETECT_BQ24392
+#define CONFIG_CHARGER
+#define CONFIG_CHARGER_V2
+#define CONFIG_CHARGE_MANAGER
+#define CONFIG_CHARGER_DISCHARGE_ON_AC
+#define CONFIG_CHARGER_INPUT_CURRENT 128
+#define CONFIG_CHARGER_ISL9238
+#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1
+#define CONFIG_CHARGER_SENSE_RESISTOR 10
+#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20
+#define CONFIG_CHARGE_RAMP_HW
+#define CONFIG_USB_CHARGER
+
+#define CONFIG_CHIPSET_STONEY
+#define CONFIG_CHIPSET_RESET_HOOK
+/*
+ * ACOK from ISL9238 sometimes has a negative pulse after connecting
+ * USB-C power. We want to ignore it. b/77455171
+ */
+#undef CONFIG_EXTPOWER_DEBOUNCE_MS
+#define CONFIG_EXTPOWER_DEBOUNCE_MS 200
+#define CONFIG_EXTPOWER_GPIO
+#define CONFIG_POWER_COMMON
+#define CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5
+#define CONFIG_POWER_BUTTON
+#define CONFIG_POWER_BUTTON_X86
+
+#define CONFIG_KEYBOARD_BOARD_CONFIG
+#define CONFIG_KEYBOARD_COL2_INVERTED
+#define CONFIG_KEYBOARD_PROTOCOL_8042
+#define CONFIG_KEYBOARD_REFRESH_ROW3
+#define CONFIG_KEYBOARD_IGNORE_REFRESH_BOOT_KEY
+#define CONFIG_KEYBOARD_PWRBTN_ASSERTS_KSI3
+
+#define CONFIG_USB_POWER_DELIVERY
+#define CONFIG_CMD_PD_CONTROL
+#define CONFIG_USB_PD_ALT_MODE
+#define CONFIG_USB_PD_ALT_MODE_DFP
+#define CONFIG_USB_PD_COMM_LOCKED
+#define CONFIG_USB_PD_DISCHARGE_PPC
+#define CONFIG_USB_PD_DUAL_ROLE
+#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
+#define CONFIG_USB_PD_LOGGING
+#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0
+#define CONFIG_USB_PD_PORT_COUNT 2
+#define CONFIG_USB_PD_TCPC_LOW_POWER
+#define CONFIG_USB_PD_TCPM_ANX3429
+#define CONFIG_USB_PD_TCPM_MUX
+#define CONFIG_USB_PD_TCPM_PS8751
+#define CONFIG_USB_PD_TCPM_TCPCI
+#define CONFIG_USB_PD_TRY_SRC
+#define CONFIG_USB_PD_VBUS_DETECT_PPC
+#define CONFIG_USBC_PPC_SN5S330
+#define CONFIG_USBC_SS_MUX
+#define CONFIG_USBC_SS_MUX_DFP_ONLY
+#define CONFIG_USBC_VCONN
+#define CONFIG_USBC_VCONN_SWAP
+
+/* USB-A config */
+#define CONFIG_USB_PORT_POWER_DUMB
+#define USB_PORT_COUNT 2
+
+/* TODO(b/69683108): Use correct PD delay values */
+#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */
+#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */
+#define PD_VCONN_SWAP_DELAY 5000 /* us */
+
+/* TODO(b/69683178): Use correct PD power values */
+#define PD_OPERATING_POWER_MW 15000
+#define PD_MAX_POWER_MW 45000
+#define PD_MAX_CURRENT_MA 3000
+#define PD_MAX_VOLTAGE_MV 20000
+
+#define I2C_PORT_BATTERY I2C_PORT_POWER
+#define I2C_PORT_CHARGER I2C_PORT_POWER
+#define I2C_PORT_POWER NPCX_I2C_PORT0_0
+#define I2C_PORT_TCPC0 NPCX_I2C_PORT1_0
+#define I2C_PORT_TCPC1 NPCX_I2C_PORT2_0
+#define I2C_PORT_THERMAL NPCX_I2C_PORT3_0
+#define I2C_PORT_SENSOR NPCX_I2C_PORT7_0
+/* Accelerometer and Gyroscope are the same device. */
+#define I2C_PORT_ACCEL I2C_PORT_SENSOR
+
+/* Sensors */
+#define CONFIG_MKBP_EVENT
+#define CONFIG_MKBP_USE_HOST_EVENT
+#define CONFIG_ACCELGYRO_BMI160
+#define CONFIG_ACCELGYRO_BMI160_INT_EVENT TASK_EVENT_CUSTOM(4)
+#define CONFIG_ACCEL_INTERRUPTS
+#define CONFIG_ACCEL_KX022
+#define CONFIG_CMD_ACCELS
+#define CONFIG_CMD_ACCEL_INFO
+#define CONFIG_LID_ANGLE
+#define CONFIG_LID_ANGLE_UPDATE
+#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL
+#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL
+
+/* Thermal */
+#define CONFIG_TEMP_SENSOR_SB_TSI
+
+/* FIFO size is a power of 2. */
+#define CONFIG_ACCEL_FIFO 1024 /* TODO(teravest): Check this value. */
+
+/* Depends on how fast the AP boots and typical ODRs. */
+#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO / 3)
+
+#define USB_PD_PORT_ANX74XX 0
+#define USB_PD_PORT_PS8751 1
+
+#ifndef __ASSEMBLER__
+
+#include "gpio_signal.h"
+#include "registers.h"
+
+enum adc_channel {
+ ADC_TEMP_SENSOR_CHARGER,
+ ADC_TEMP_SENSOR_SOC,
+ ADC_VBUS,
+ ADC_SKU_ID1,
+ ADC_SKU_ID2,
+ ADC_CH_COUNT
+};
+
+enum power_signal {
+ X86_SLP_S3_N,
+ X86_SLP_S5_N,
+ X86_S0_PGOOD,
+ X86_S5_PGOOD,
+ POWER_SIGNAL_COUNT
+};
+
+enum temp_sensor_id {
+ TEMP_SENSOR_CHARGER = 0,
+ TEMP_SENSOR_SOC,
+ TEMP_SENSOR_CPU,
+ TEMP_SENSOR_COUNT
+};
+
+enum pwm_channel {
+ PWM_CH_KBLIGHT = 0,
+ PWM_CH_LED1_AMBER,
+ PWM_CH_LED2_BLUE,
+ PWM_CH_COUNT
+};
+
+enum sensor_id {
+ LID_ACCEL,
+ BASE_ACCEL,
+ BASE_GYRO,
+};
+
+/* Sensors without hardware FIFO are in forced mode */
+#define CONFIG_ACCEL_FORCE_MODE_MASK (1 << LID_ACCEL)
+
+void board_reset_pd_mcu(void);
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __CROS_EC_BASEBOARD_H */
diff --git a/baseboard/grunt/battery.c b/baseboard/grunt/battery.c
new file mode 100644
index 0000000000..8c9755daac
--- /dev/null
+++ b/baseboard/grunt/battery.c
@@ -0,0 +1,126 @@
+/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Battery pack vendor provided charging profile
+ */
+
+#include "battery.h"
+#include "battery_smart.h"
+#include "console.h"
+#include "extpower.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "timer.h"
+
+#define CPRINTS(format, args...) cprints(CC_CHARGER, format, ## args)
+
+/* Shutdown mode parameter to write to manufacturer access register */
+#define SB_SHUTDOWN_DATA 0x0010
+
+static enum battery_present batt_pres_prev = BP_NOT_SURE;
+
+/* Battery may delay reporting battery present */
+static int battery_report_present = 1;
+
+static const struct battery_info info = {
+ .voltage_max = 13200, /* mV */
+ .voltage_normal = 11550,
+ .voltage_min = 9000,
+ .precharge_current = 256, /* mA */
+ .start_charging_min_c = 0,
+ .start_charging_max_c = 50,
+ .charging_min_c = 0,
+ .charging_max_c = 60,
+ .discharging_min_c = -20,
+ .discharging_max_c = 75,
+};
+
+const struct battery_info *battery_get_info(void)
+{
+ return &info;
+}
+
+int board_cut_off_battery(void)
+{
+ int rv;
+ /* Ship mode command must be sent twice to take effect */
+ rv = sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
+ if (rv != EC_SUCCESS)
+ return rv;
+ return sb_write(SB_MANUFACTURER_ACCESS, SB_SHUTDOWN_DATA);
+}
+
+enum battery_present battery_hw_present(void)
+{
+ /* The GPIO is low when the battery is physically present */
+ return gpio_get_level(GPIO_EC_BATT_PRES_ODL) ? BP_NO : BP_YES;
+}
+
+static int battery_init(void)
+{
+ int batt_status;
+
+ return battery_status(&batt_status) ? 0 :
+ !!(batt_status & STATUS_INITIALIZED);
+}
+
+/* Allow booting now that the battery has woke up */
+static void battery_now_present(void)
+{
+ CPRINTS("battery will now report present");
+ battery_report_present = 1;
+}
+DECLARE_DEFERRED(battery_now_present);
+
+static int battery_check_disconnect(void)
+{
+ /* TODO(ecgh): Read the status of charge/discharge FETs */
+ return BATTERY_NOT_DISCONNECTED;
+}
+
+enum battery_present battery_is_present(void)
+{
+ enum battery_present batt_pres;
+ static int battery_report_present_timer_started;
+
+ /* Get the physical hardware status */
+ batt_pres = battery_hw_present();
+
+ /*
+ * Make sure battery status is implemented, I2C transactions are
+ * success & the battery status is Initialized to find out if it
+ * is a working battery and it is not in the cut-off mode.
+ */
+ if (batt_pres == BP_YES && batt_pres_prev != batt_pres &&
+ (battery_is_cut_off() != BATTERY_CUTOFF_STATE_NORMAL ||
+ battery_check_disconnect() != BATTERY_NOT_DISCONNECTED ||
+ battery_init() == 0)) {
+ battery_report_present = 0;
+ /*
+ * When this path is taken, the _timer_started flag must be
+ * reset so the 'else if' path will be entered and the
+ * battery_report_present flag can be set by the deferred
+ * call. This handles the case of the battery being disconected
+ * and reconnected while running or if battery_init() returns an
+ * error due to a failed sb_read.
+ */
+ battery_report_present_timer_started = 0;
+ } else if (batt_pres == BP_YES && batt_pres_prev == BP_NO &&
+ !battery_report_present_timer_started) {
+ /*
+ * Wait 1/2 second before reporting present if it was
+ * previously reported as not present
+ */
+ battery_report_present_timer_started = 1;
+ battery_report_present = 0;
+ hook_call_deferred(&battery_now_present_data, 500 * MSEC);
+ }
+
+ if (!battery_report_present)
+ batt_pres = BP_NO;
+
+ batt_pres_prev = batt_pres;
+
+ return batt_pres;
+}
diff --git a/baseboard/grunt/build.mk b/baseboard/grunt/build.mk
new file mode 100644
index 0000000000..5a5942a0c6
--- /dev/null
+++ b/baseboard/grunt/build.mk
@@ -0,0 +1,11 @@
+# -*- makefile -*-
+# Copyright 2018 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Baseboard specific files build
+#
+
+baseboard-y=baseboard.o
+baseboard-$(CONFIG_BATTERY_SMART)+=battery.o
+baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
diff --git a/baseboard/grunt/usb_pd_policy.c b/baseboard/grunt/usb_pd_policy.c
new file mode 100644
index 0000000000..0d18aad5f1
--- /dev/null
+++ b/baseboard/grunt/usb_pd_policy.c
@@ -0,0 +1,446 @@
+/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Shared USB-C policy for Grunt boards */
+
+#include "charge_manager.h"
+#include "common.h"
+#include "compile_time_macros.h"
+#include "console.h"
+#include "ec_commands.h"
+#include "gpio.h"
+#include "system.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+
+#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
+ PDO_FIXED_COMM_CAP)
+
+/* TODO(ecgh): fill in correct source and sink capabilities */
+const uint32_t pd_src_pdo[] = {
+ PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
+const uint32_t pd_src_pdo_max[] = {
+ PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_max_cnt = ARRAY_SIZE(pd_src_pdo_max);
+
+const uint32_t pd_snk_pdo[] = {
+ PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
+ PDO_BATT(4750, 21000, 15000),
+ PDO_VAR(4750, 21000, 3000),
+};
+const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
+
+int pd_board_checks(void)
+{
+ return EC_SUCCESS;
+}
+
+int pd_check_data_swap(int port, int data_role)
+{
+ /*
+ * Allow data swap if we are a UFP, otherwise don't allow.
+ *
+ * When we are still in the Read-Only firmware, avoid swapping roles
+ * so we don't jump in RW as a SNK/DFP and potentially confuse the
+ * power supply by sending a soft-reset with wrong data role.
+ */
+ return (data_role == PD_ROLE_UFP) &&
+ (system_get_image_copy() != SYSTEM_IMAGE_RO) ? 1 : 0;
+}
+
+void pd_check_dr_role(int port, int dr_role, int flags)
+{
+ /* If UFP, try to switch to DFP */
+ if ((flags & PD_FLAGS_PARTNER_DR_DATA) &&
+ dr_role == PD_ROLE_UFP &&
+ system_get_image_copy() != SYSTEM_IMAGE_RO)
+ pd_request_data_swap(port);
+}
+
+int pd_check_power_swap(int port)
+{
+ /*
+ * Allow power swap as long as we are acting as a dual role device,
+ * otherwise assume our role is fixed (not in S0 or console command
+ * to fix our role).
+ */
+ return pd_get_dual_role() == PD_DRP_TOGGLE_ON ? 1 : 0;
+}
+
+void pd_check_pr_role(int port, int pr_role, int flags)
+{
+ /*
+ * If partner is dual-role power and dualrole toggling is on, consider
+ * if a power swap is necessary.
+ */
+ if ((flags & PD_FLAGS_PARTNER_DR_POWER) &&
+ pd_get_dual_role() == PD_DRP_TOGGLE_ON) {
+ /*
+ * If we are a sink and partner is not externally powered, then
+ * swap to become a source. If we are source and partner is
+ * externally powered, swap to become a sink.
+ */
+ int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER;
+
+ if ((!partner_extpower && pr_role == PD_ROLE_SINK) ||
+ (partner_extpower && pr_role == PD_ROLE_SOURCE))
+ pd_request_power_swap(port);
+ }
+}
+
+int pd_check_vconn_swap(int port)
+{
+ /* in G3, do not allow vconn swap since 5V rail is off */
+ return gpio_get_level(GPIO_S5_PGOOD);
+}
+
+void pd_execute_data_swap(int port, int data_role)
+{
+ /* Do nothing */
+}
+
+int pd_is_valid_input_voltage(int mv)
+{
+ return 1;
+}
+
+void pd_power_supply_reset(int port)
+{
+ int prev_en;
+
+ prev_en = ppc_is_sourcing_vbus(port);
+
+ /* Disable VBUS. */
+ ppc_vbus_source_enable(port, 0);
+
+ /* Enable discharge if we were previously sourcing 5V */
+ if (prev_en)
+ pd_set_vbus_discharge(port, 1);
+
+#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT
+ /* Give back the current quota we are no longer using */
+ charge_manager_source_port(port, 0);
+#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */
+
+ /* Notify host of power info change. */
+ pd_send_host_event(PD_EVENT_POWER_CHANGE);
+}
+
+int pd_set_power_supply_ready(int port)
+{
+ int rv;
+
+ /* Disable charging. */
+ rv = ppc_vbus_sink_enable(port, 0);
+ if (rv)
+ return rv;
+
+ pd_set_vbus_discharge(port, 0);
+
+ /* Provide Vbus. */
+ rv = ppc_vbus_source_enable(port, 1);
+ if (rv)
+ return rv;
+
+#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT
+ /* Ensure we advertise the proper available current quota */
+ charge_manager_source_port(port, 1);
+#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */
+
+ /* Notify host of power info change. */
+ pd_send_host_event(PD_EVENT_POWER_CHANGE);
+
+ return EC_SUCCESS;
+}
+
+void pd_transition_voltage(int idx)
+{
+ /* No-operation: we are always 5V */
+}
+
+void typec_set_source_current_limit(int port, int rp)
+{
+ ppc_set_vbus_source_current_limit(port, rp);
+}
+
+int pd_snk_is_vbus_provided(int port)
+{
+ return ppc_is_vbus_present(port);
+}
+
+int board_vbus_source_enabled(int port)
+{
+ return ppc_is_sourcing_vbus(port);
+}
+
+/* ----------------- Vendor Defined Messages ------------------ */
+const struct svdm_response svdm_rsp = {
+ .identity = NULL,
+ .svids = NULL,
+ .modes = NULL,
+};
+
+int pd_custom_vdm(int port, int cnt, uint32_t *payload,
+ uint32_t **rpayload)
+{
+ int cmd = PD_VDO_CMD(payload[0]);
+ uint16_t dev_id = 0;
+ int is_rw, is_latest;
+
+ /* make sure we have some payload */
+ if (cnt == 0)
+ return 0;
+
+ switch (cmd) {
+ case VDO_CMD_VERSION:
+ /* guarantee last byte of payload is null character */
+ *(payload + cnt - 1) = 0;
+ CPRINTF("version: %s\n", (char *)(payload+1));
+ break;
+ case VDO_CMD_READ_INFO:
+ case VDO_CMD_SEND_INFO:
+ /* copy hash */
+ if (cnt == 7) {
+ dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
+ is_rw = VDO_INFO_IS_RW(payload[6]);
+
+ is_latest = pd_dev_store_rw_hash(port,
+ dev_id,
+ payload + 1,
+ is_rw ?
+ SYSTEM_IMAGE_RW :
+ SYSTEM_IMAGE_RO);
+ /*
+ * Send update host event unless our RW hash is
+ * already known to be the latest update RW.
+ */
+ if (!is_rw || !is_latest)
+ pd_send_host_event(PD_EVENT_UPDATE_DEVICE);
+
+ CPRINTF("DevId:%d.%d SW:%d RW:%d\n",
+ HW_DEV_ID_MAJ(dev_id),
+ HW_DEV_ID_MIN(dev_id),
+ VDO_INFO_SW_DBG_VER(payload[6]),
+ is_rw);
+ } else if (cnt == 6) {
+ /* really old devices don't have last byte */
+ pd_dev_store_rw_hash(port, dev_id, payload + 1,
+ SYSTEM_IMAGE_UNKNOWN);
+ }
+ break;
+ case VDO_CMD_CURRENT:
+ CPRINTF("Current: %dmA\n", payload[1]);
+ break;
+ case VDO_CMD_FLIP:
+ usb_mux_flip(port);
+ break;
+#ifdef CONFIG_USB_PD_LOGGING
+ case VDO_CMD_GET_LOG:
+ pd_log_recv_vdm(port, cnt, payload);
+ break;
+#endif /* CONFIG_USB_PD_LOGGING */
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_USB_PD_ALT_MODE_DFP
+static int dp_flags[CONFIG_USB_PD_PORT_COUNT];
+static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT];
+
+static void svdm_safe_dp_mode(int port)
+{
+ /* make DP interface safe until configure */
+ dp_flags[port] = 0;
+ dp_status[port] = 0;
+ usb_mux_set(port, TYPEC_MUX_NONE,
+ USB_SWITCH_CONNECT, pd_get_polarity(port));
+}
+
+static int svdm_enter_dp_mode(int port, uint32_t mode_caps)
+{
+ /* Only enter mode if device is DFP_D capable */
+ if (mode_caps & MODE_DP_SNK) {
+ svdm_safe_dp_mode(port);
+ return 0;
+ }
+
+ return -1;
+}
+
+static int svdm_dp_status(int port, uint32_t *payload)
+{
+ int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+
+ payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+ CMD_DP_STATUS | VDO_OPOS(opos));
+ payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */
+ 0, /* HPD level ... not applicable */
+ 0, /* exit DP? ... no */
+ 0, /* usb mode? ... no */
+ 0, /* multi-function ... no */
+ (!!(dp_flags[port] & DP_FLAGS_DP_ON)),
+ 0, /* power low? ... no */
+ (!!(dp_flags[port] & DP_FLAGS_DP_ON)));
+ return 2;
+};
+
+static int svdm_dp_config(int port, uint32_t *payload)
+{
+ int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+ int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]);
+ int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]);
+
+ if (!pin_mode)
+ return 0;
+
+ usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP,
+ USB_SWITCH_CONNECT, pd_get_polarity(port));
+
+ payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+ CMD_DP_CONFIG | VDO_OPOS(opos));
+ payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */
+ 1, /* DPv1.3 signaling */
+ 2); /* UFP connected */
+ return 2;
+};
+
+/*
+ * timestamp of the next possible toggle to ensure the 2-ms spacing
+ * between IRQ_HPD.
+ */
+static uint64_t hpd_deadline[CONFIG_USB_PD_PORT_COUNT];
+
+#define PORT_TO_HPD(port) ((port) ? GPIO_USB_C1_DP_HPD : GPIO_USB_C0_DP_HPD)
+static void svdm_dp_post_config(int port)
+{
+ const struct usb_mux * const mux = &usb_muxes[port];
+
+ dp_flags[port] |= DP_FLAGS_DP_ON;
+ if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING))
+ return;
+
+ gpio_set_level(PORT_TO_HPD(port), 1);
+
+ /* set the minimum time delay (2ms) for the next HPD IRQ */
+ hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL;
+ mux->hpd_update(port, 1, 0);
+}
+
+static int svdm_dp_attention(int port, uint32_t *payload)
+{
+ int cur_lvl;
+ int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]);
+ int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
+ enum gpio_signal hpd = PORT_TO_HPD(port);
+ const struct usb_mux * const mux = &usb_muxes[port];
+
+ cur_lvl = gpio_get_level(hpd);
+ dp_status[port] = payload[1];
+
+ /* Its initial DP status message prior to config */
+ if (!(dp_flags[port] & DP_FLAGS_DP_ON)) {
+ if (lvl)
+ dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING;
+ return 1; /* ack */
+ }
+
+ if (irq && cur_lvl) {
+ uint64_t now = get_time().val;
+ /* wait for the minimum spacing between IRQ_HPD if needed */
+ if (now < hpd_deadline[port])
+ usleep(hpd_deadline[port] - now);
+
+ /* generate IRQ_HPD pulse */
+ gpio_set_level(hpd, 0);
+ usleep(HPD_DSTREAM_DEBOUNCE_IRQ);
+ gpio_set_level(hpd, 1);
+
+ /* set the minimum time delay (2ms) for the next HPD IRQ */
+ hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL;
+ } else if (irq && !cur_lvl) {
+ /*
+ * IRQ can only be generated when the level is high, because
+ * the IRQ is signaled by a short low pulse from the high level.
+ */
+ CPRINTF("ERR:HPD:IRQ&LOW\n");
+ return 0; /* nak */
+ } else {
+ gpio_set_level(hpd, lvl);
+ /* set the minimum time delay (2ms) for the next HPD IRQ */
+ hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL;
+ }
+ mux->hpd_update(port, lvl, irq);
+ return 1; /* ack */
+}
+
+static void svdm_exit_dp_mode(int port)
+{
+ const struct usb_mux * const mux = &usb_muxes[port];
+
+ svdm_safe_dp_mode(port);
+ gpio_set_level(PORT_TO_HPD(port), 0);
+ mux->hpd_update(port, 0, 0);
+}
+
+static int svdm_enter_gfu_mode(int port, uint32_t mode_caps)
+{
+ /* Always enter GFU mode */
+ return 0;
+}
+
+static void svdm_exit_gfu_mode(int port)
+{
+}
+
+static int svdm_gfu_status(int port, uint32_t *payload)
+{
+ /*
+ * This is called after enter mode is successful, send unstructured
+ * VDM to read info.
+ */
+ pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0);
+ return 0;
+}
+
+static int svdm_gfu_config(int port, uint32_t *payload)
+{
+ return 0;
+}
+
+static int svdm_gfu_attention(int port, uint32_t *payload)
+{
+ return 0;
+}
+
+const struct svdm_amode_fx supported_modes[] = {
+ {
+ .svid = USB_SID_DISPLAYPORT,
+ .enter = &svdm_enter_dp_mode,
+ .status = &svdm_dp_status,
+ .config = &svdm_dp_config,
+ .post_config = &svdm_dp_post_config,
+ .attention = &svdm_dp_attention,
+ .exit = &svdm_exit_dp_mode,
+ },
+ {
+ .svid = USB_VID_GOOGLE,
+ .enter = &svdm_enter_gfu_mode,
+ .status = &svdm_gfu_status,
+ .config = &svdm_gfu_config,
+ .attention = &svdm_gfu_attention,
+ .exit = &svdm_exit_gfu_mode,
+ }
+};
+const int supported_modes_cnt = ARRAY_SIZE(supported_modes);
+#endif /* CONFIG_USB_PD_ALT_MODE_DFP */