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| author | Scott Collyer <scollyer@google.com> | 2019-04-24 11:46:04 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-05-08 19:35:20 -0700 |
| commit | 2befbf878db0d4a51349eac629d9a61e5459d2aa (patch) | |
| tree | 8e430958db0448dfb91f3ef28049ba8339891575 /baseboard | |
| parent | b8b8d41c4fe01cb068f2175831bc42e21e54bb1f (diff) | |
| download | chrome-ec-2befbf878db0d4a51349eac629d9a61e5459d2aa.tar.gz | |
hatch/kohaku: Account for TCPC reset polarity in ALERT handler
Reset polarity was added to tcpc_config so that the reset function
could be common across different boards which have different TCPC
selections. This was applied to pd_reset_mcu(), however, that CL did
not take into account the reset polarity in the tcpc_get_alert_status
function. This CL fixes that oversight.
In addition, this CL fixes the name for kohaku's port 0 TCPC reset
line to match the schematic.
BUG=b:130194031
BRANCH=none
TEST=verified on Hatch that both ports 0/1 function correctly.
Change-Id: I0d75d3655c799d4c74f4a6fb1805c06c1fe99c06
Signed-off-by: Scott Collyer <scollyer@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1582964
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'baseboard')
| -rw-r--r-- | baseboard/hatch/baseboard.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/baseboard/hatch/baseboard.c b/baseboard/hatch/baseboard.c index debdd015c3..2e9c23aa19 100644 --- a/baseboard/hatch/baseboard.c +++ b/baseboard/hatch/baseboard.c @@ -177,19 +177,23 @@ DECLARE_HOOK(HOOK_INIT, baseboard_tcpc_init, HOOK_PRIO_INIT_I2C + 1); uint16_t tcpc_get_alert_status(void) { uint16_t status = 0; + int level; /* * Check which port has the ALERT line set and ignore if that TCPC has - * its reset line active. Note that port 0 reset is active high and - * port 1 reset is active low. + * its reset line active. */ if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) { - if (!gpio_get_level(GPIO_USB_C0_TCPC_RST)) + level = !!(tcpc_config[USB_PD_PORT_TCPC_0].flags & + TCPC_FLAGS_RESET_ACTIVE_HIGH); + if (gpio_get_level(GPIO_USB_C0_TCPC_RST) != level) status |= PD_STATUS_TCPC_ALERT_0; } if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) { - if (gpio_get_level(GPIO_USB_C1_TCPC_RST_ODL)) + level = !!(tcpc_config[USB_PD_PORT_TCPC_1].flags & + TCPC_FLAGS_RESET_ACTIVE_HIGH); + if (gpio_get_level(GPIO_USB_C1_TCPC_RST) != level) status |= PD_STATUS_TCPC_ALERT_1; } @@ -225,7 +229,7 @@ void board_reset_pd_mcu(void) BOARD_TCPC_C0_RESET_POST_DELAY); /* Reset TCPC1 */ - reset_pd_port(USB_PD_PORT_TCPC_1, GPIO_USB_C1_TCPC_RST_ODL, + reset_pd_port(USB_PD_PORT_TCPC_1, GPIO_USB_C1_TCPC_RST, BOARD_TCPC_C1_RESET_HOLD_DELAY, BOARD_TCPC_C1_RESET_POST_DELAY); } |