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authorRuibin Chang <ruibin.chang@ite.com.tw>2020-03-11 17:00:10 +0800
committerCommit Bot <commit-bot@chromium.org>2020-03-12 06:09:33 +0000
commit3426fb1e93654ff2bba8b7ea7c2e143487462d18 (patch)
treeea94c1578f33b5446ac78463e5051c93c1cd7165 /baseboard
parent72c922bd73f22fc1f3cea29d078516017c56e83c (diff)
downloadchrome-ec-3426fb1e93654ff2bba8b7ea7c2e143487462d18.tar.gz
baseboard/ite_evb: create ite_evb baseboard
The development board of it83xx and it8xxx2 have common code and config options which are moved to baseboard ite_evb. And we create another board for PD EVB based on baseboard ite_evb. BUG=none BRANCH=none TEST=on baseboard ite_evb: 1.test board it83xx_evb and it8xxx2_evb: successfully Flash EC image and boot on chip it8320 and it83202. 2.flashrom by ite_spi test: $ sudo ./util/flash_ec --board=it8xxx2_evb --verbose INFO: Using servo_v2. INFO: Using ec image : /mnt/host/source/src/platform/ec/build/ it8xxx2_evb/ec.bin dut-control --port=9999 i2c_mux_en:on dut-control --port=9999 i2c_mux:remote_adc INFO: Flashing chip ite_spi. dut-control --port=9999 cold_reset:on dut-control --port=9999 fw_up:on dut-control --port=9999 cold_reset:off dut-control --port=9999 fw_up:off dut-control --port=9999 spi1_vref:pp1800 spi1_buf_en:on dut-control --port=9999 spi1_buf_on_flex_en:on INFO: Running flashrom: sudo /usr/sbin/flashrom -p ft2232_spi:type=servo-v2,port=B, serial=911416-00012 --flash-size flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) INFO: Programming EC firmware image. INFO: Running flashrom: /usr/sbin/flashrom -p ft2232_spi:type=servo-v2,port=B, serial=911416-00012 -w /tmp/flash_spi_6163 flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) flashrom v0.9.9 : : on Linux 4.15.0-76-generic (x86_64) Calibrating delay loop... OK. Erasing and writing flash chip... Verifying flash... VERIFIED. SUCCESS INFO: Flashing done. INFO: Restoring servo settings... dut-control --port=9999 cold_reset:off dut-control --port=9999 i2c_mux_en:on dut-control --port=9999 i2c_mux:remote_adc dut-control --port=9999 spi1_vref:off dut-control --port=9999 spi1_buf_en:off dut-control --port=9999 spi1_buf_on_flex_en:off dut-control --port=9999 cold_reset:on dut-control --port=9999 cold_reset:off 3.test board it8xxx2_pdevb: successfully Flash EC image and boot on chip it83202. Connection with adapter and dongle are able to ready state. Change-Id: Ib6371b61c27980eb9977548177efb8c896e72d47 Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw> Signed-off-by: tim <tim2.lin@ite.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2071551 Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'baseboard')
-rw-r--r--baseboard/ite_evb/baseboard.c197
-rw-r--r--baseboard/ite_evb/baseboard.h50
-rw-r--r--baseboard/ite_evb/build.mk10
-rw-r--r--baseboard/ite_evb/usb_pd_policy.c140
4 files changed, 397 insertions, 0 deletions
diff --git a/baseboard/ite_evb/baseboard.c b/baseboard/ite_evb/baseboard.c
new file mode 100644
index 0000000000..0bd537ef4f
--- /dev/null
+++ b/baseboard/ite_evb/baseboard.c
@@ -0,0 +1,197 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* ite_evb baseboard configuration */
+#include "clock.h"
+#include "common.h"
+#include "console.h"
+#include "fan.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "i2c.h"
+#include "intc.h"
+#include "keyboard_scan.h"
+#include "lid_switch.h"
+#include "lpc.h"
+#include "power_button.h"
+#include "pwm_chip.h"
+#include "registers.h"
+#include "spi.h"
+#include "switch.h"
+#include "system.h"
+#include "task.h"
+#include "timer.h"
+#include "uart.h"
+#include "util.h"
+#include "gpio_list.h"
+
+#if defined(CONFIG_FANS) || defined(CONFIG_PWM)
+const struct fan_conf fan_conf_0 = {
+ .flags = FAN_USE_RPM_MODE,
+ .ch = 0, /* Use MFT id to control fan */
+ .pgood_gpio = -1,
+ .enable_gpio = -1,
+};
+
+const struct fan_rpm fan_rpm_0 = {
+ .rpm_min = 1500,
+ .rpm_start = 1500,
+ .rpm_max = 6500,
+};
+
+const struct fan_t fans[] = {
+ { .conf = &fan_conf_0,
+ .rpm = &fan_rpm_0, },
+};
+BUILD_ASSERT(ARRAY_SIZE(fans) == CONFIG_FANS);
+
+/*
+ * PWM HW channelx binding tachometer channelx for fan control.
+ * Four tachometer input pins but two tachometer modules only,
+ * so always binding [TACH_CH_TACH0A | TACH_CH_TACH0B] and/or
+ * [TACH_CH_TACH1A | TACH_CH_TACH1B]
+ */
+const struct fan_tach_t fan_tach[] = {
+ [PWM_HW_CH_DCR0] = {
+ .ch_tach = TACH_CH_NULL,
+ .fan_p = -1,
+ .rpm_re = -1,
+ .s_duty = -1,
+ },
+ [PWM_HW_CH_DCR1] = {
+ .ch_tach = TACH_CH_NULL,
+ .fan_p = -1,
+ .rpm_re = -1,
+ .s_duty = -1,
+ },
+ [PWM_HW_CH_DCR2] = {
+ .ch_tach = TACH_CH_TACH1A,
+ .fan_p = -1,
+ .rpm_re = -1,
+ .s_duty = -1,
+ },
+ [PWM_HW_CH_DCR3] = {
+ .ch_tach = TACH_CH_NULL,
+ .fan_p = -1,
+ .rpm_re = -1,
+ .s_duty = -1,
+ },
+ [PWM_HW_CH_DCR4] = {
+ .ch_tach = TACH_CH_NULL,
+ .fan_p = -1,
+ .rpm_re = -1,
+ .s_duty = -1,
+ },
+ [PWM_HW_CH_DCR5] = {
+ .ch_tach = TACH_CH_NULL,
+ .fan_p = -1,
+ .rpm_re = -1,
+ .s_duty = -1,
+ },
+ [PWM_HW_CH_DCR6] = {
+ .ch_tach = TACH_CH_NULL,
+ .fan_p = -1,
+ .rpm_re = -1,
+ .s_duty = -1,
+ },
+ [PWM_HW_CH_DCR7] = {
+ .ch_tach = TACH_CH_TACH0A,
+ .fan_p = 2,
+ .rpm_re = 50,
+ .s_duty = 30,
+ },
+};
+BUILD_ASSERT(ARRAY_SIZE(fan_tach) == PWM_HW_CH_TOTAL);
+#endif /* defined(CONFIG_FANS) || defined(CONFIG_PWM) */
+
+#if defined(CONFIG_KEYBOARD_BOARD_CONFIG)
+/* Keyboard scan setting */
+struct keyboard_scan_config keyscan_config = {
+ .output_settle_us = 35,
+ .debounce_down_us = 5 * MSEC,
+ .debounce_up_us = 40 * MSEC,
+ .scan_period_us = 3 * MSEC,
+ .min_post_scan_delay_us = 1000,
+ .poll_timeout_us = 100 * MSEC,
+ .actual_key_mask = {
+ 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff,
+ 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca /* full set */
+ },
+};
+#endif
+
+#if defined(CONFIG_SPI_FLASH_PORT)
+/* SPI devices */
+const struct spi_device_t spi_devices[] = {
+ [CONFIG_SPI_FLASH_PORT] = {
+ .port = CONFIG_SPI_FLASH_PORT,
+ .div = 0,
+ .gpio_cs = -1
+ },
+};
+const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
+#endif
+
+/* Initialize board. */
+static void board_init(void)
+{
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+/* Wake-up pins for hibernate */
+const enum gpio_signal hibernate_wake_pins[] = {
+ GPIO_POWER_BUTTON_L, GPIO_LID_OPEN
+};
+const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
+
+/*
+ * I2C channels (A, B, and C) are using the same timing registers (00h~07h)
+ * at default.
+ * In order to set frequency independently for each channels,
+ * We use timing registers 09h~0Bh, and the supported frequency will be:
+ * 50KHz, 100KHz, 400KHz, or 1MHz.
+ * I2C channels (D, E and F) can be set different frequency on different ports.
+ * The I2C(D/E/F) frequency depend on the frequency of SMBus Module and
+ * the individual prescale register.
+ * The frequency of SMBus module is 24MHz on default.
+ * The allowed range of I2C(D/E/F) frequency is as following setting.
+ * SMBus Module Freq = PLL_CLOCK / ((IT83XX_ECPM_SCDCR2 & 0x0F) + 1)
+ * (SMBus Module Freq / 510) <= I2C Freq <= (SMBus Module Freq / 8)
+ * Channel D has multi-function and can be used as UART interface.
+ * Channel F is reserved for EC debug.
+ */
+
+/* I2C ports */
+const struct i2c_port_t i2c_ports[] = {
+ {
+ .name = "battery",
+ .port = I2C_PORT_BATTERY,
+ .kbps = 100,
+ .scl = GPIO_I2C_C_SCL,
+ .sda = GPIO_I2C_C_SDA,
+ },
+ {
+ .name = "evb-1",
+ .port = IT83XX_I2C_CH_A,
+ .kbps = 100,
+ .scl = GPIO_I2C_A_SCL,
+ .sda = GPIO_I2C_A_SDA,
+ },
+ {
+ .name = "evb-2",
+ .port = IT83XX_I2C_CH_B,
+ .kbps = 100,
+ .scl = GPIO_I2C_B_SCL,
+ .sda = GPIO_I2C_B_SDA,
+ },
+ {
+ .name = "opt-4",
+ .port = IT83XX_I2C_CH_E,
+ .kbps = 100,
+ .scl = GPIO_I2C_E_SCL,
+ .sda = GPIO_I2C_E_SDA,
+ },
+};
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
diff --git a/baseboard/ite_evb/baseboard.h b/baseboard/ite_evb/baseboard.h
new file mode 100644
index 0000000000..34c4fee278
--- /dev/null
+++ b/baseboard/ite_evb/baseboard.h
@@ -0,0 +1,50 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* ite_evb baseboard configuration */
+
+#ifndef __CROS_EC_BASEBOARD_H
+#define __CROS_EC_BASEBOARD_H
+
+/* Optional features */
+#define CONFIG_BATTERY_SMART
+#define CONFIG_BOARD_VERSION_GPIO
+#define CONFIG_FANS 1
+#define CONFIG_I2C
+#define CONFIG_I2C_MASTER
+#define CONFIG_IT83XX_ENABLE_MOUSE_DEVICE
+#define CONFIG_IT83XX_SMCLK2_ON_GPC7
+#define CONFIG_KEYBOARD_BOARD_CONFIG
+#define CONFIG_KEYBOARD_PROTOCOL_8042
+#define CONFIG_LOW_POWER_IDLE
+#define CONFIG_LOW_POWER_S0
+#define CONFIG_PECI
+#define CONFIG_PECI_COMMON
+#define CONFIG_PECI_TJMAX 100
+#define CONFIG_POWER_BUTTON
+#define CONFIG_PWM
+/* Use CS0 of SSPI */
+#define CONFIG_SPI_MASTER
+#define CONFIG_SPI_FLASH_PORT 0
+#define CONFIG_UART_HOST
+#define CONFIG_HOSTCMD_LPC
+
+/* Optional console commands */
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_SCRATCHPAD
+#define CONFIG_CMD_STACKOVERFLOW
+
+/* Debug */
+#undef CONFIG_CMD_FORCETIME
+#undef CONFIG_HOOK_DEBUG
+#undef CONFIG_KEYBOARD_DEBUG
+#undef CONFIG_UART_TX_BUF_SIZE
+#define CONFIG_UART_TX_BUF_SIZE 4096
+
+/* I2C Bus Configuration */
+#define I2C_PORT_CHARGER IT83XX_I2C_CH_C
+#define I2C_PORT_BATTERY IT83XX_I2C_CH_C
+
+#endif /* __CROS_EC_BASEBOARD_H */
diff --git a/baseboard/ite_evb/build.mk b/baseboard/ite_evb/build.mk
new file mode 100644
index 0000000000..77352145ee
--- /dev/null
+++ b/baseboard/ite_evb/build.mk
@@ -0,0 +1,10 @@
+# -*- makefile -*-
+# Copyright 2020 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Baseboard specific files build
+#
+
+baseboard-y=baseboard.o
+baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o
diff --git a/baseboard/ite_evb/usb_pd_policy.c b/baseboard/ite_evb/usb_pd_policy.c
new file mode 100644
index 0000000000..59f3da13f5
--- /dev/null
+++ b/baseboard/ite_evb/usb_pd_policy.c
@@ -0,0 +1,140 @@
+/* Copyright 2020 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Shared USB-C policy for ite_evb baseboard */
+
+#include "adc.h"
+#include "config.h"
+#include "common.h"
+#include "console.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "it83xx_pd.h"
+#include "registers.h"
+#include "system.h"
+#include "task.h"
+#include "timer.h"
+#include "util.h"
+#include "usb_mux.h"
+
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+
+/* ---------------- Power Data Objects (PDOs) ----------------- */
+#ifdef CONFIG_USB_PD_CUSTOM_PDO
+#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
+ PDO_FIXED_UNCONSTRAINED | PDO_FIXED_COMM_CAP)
+
+/* Threshold voltage of VBUS provided (mV) */
+#define PD_VBUS_PROVIDED_THRESHOLD 3900
+
+const uint32_t pd_src_pdo[] = {
+ PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
+
+const uint32_t pd_snk_pdo[] = {
+ PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
+ PDO_BATT(4500, 14000, 10000),
+ PDO_VAR(4500, 14000, 3000),
+};
+const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
+#endif
+
+int pd_is_max_request_allowed(void)
+{
+ /* Max voltage request allowed */
+ return 1;
+}
+
+int pd_snk_is_vbus_provided(int port)
+{
+ int mv = ADC_READ_ERROR;
+
+ switch (port) {
+ case USBPD_PORT_A:
+ mv = adc_read_channel(ADC_VBUSSA);
+ break;
+ case USBPD_PORT_B:
+ mv = adc_read_channel(ADC_VBUSSB);
+ break;
+ case USBPD_PORT_C:
+ mv = adc_read_channel(ADC_VBUSSC);
+ break;
+ }
+
+ return mv > PD_VBUS_PROVIDED_THRESHOLD;
+}
+
+int pd_set_power_supply_ready(int port)
+{
+ /* Provide VBUS */
+ board_pd_vbus_ctrl(port, 1);
+ /* Vbus provided or not */
+ return !pd_snk_is_vbus_provided(port);
+}
+
+void pd_power_supply_reset(int port)
+{
+ /* Kill VBUS */
+ board_pd_vbus_ctrl(port, 0);
+}
+
+
+__override int pd_check_data_swap(int port, enum pd_data_role data_role)
+{
+ /* Always allow data swap: we can be DFP or UFP for USB */
+ return 1;
+}
+
+int pd_check_vconn_swap(int port)
+{
+ /*
+ * VCONN is provided directly by the battery(PPVAR_SYS)
+ * but use the same rules as power swap
+ */
+ return pd_get_dual_role(port) == PD_DRP_TOGGLE_ON ? 1 : 0;
+}
+
+/* ----------------- Vendor Defined Messages ------------------ */
+/*
+ * We don't have mux on pd evb and not define CONFIG_USBC_SS_MUX,
+ * so mux related functions do nothing then return.
+ */
+__override int svdm_enter_dp_mode(int port, uint32_t mode_caps)
+{
+ /*
+ * Do not enter dp mode, we let VDM enumeration stop after discover
+ * modes have done.
+ */
+ return -1;
+}
+
+__override void svdm_dp_post_config(int port)
+{
+}
+
+__override int svdm_dp_attention(int port, uint32_t *payload)
+{
+ /* Ack */
+ return 1;
+}
+
+__override void svdm_exit_dp_mode(int port)
+{
+}
+
+__override int pd_custom_vdm(int port, int cnt, uint32_t *payload,
+ uint32_t **rpayload)
+{
+ /* Return length 0, means nothing needn't tx */
+ return 0;
+}
+
+__override int svdm_dp_config(int port, uint32_t *payload)
+{
+ /* Return length 0, means nothing needn't tx */
+ return 0;
+};