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authorDenis Brockus <dbrockus@chromium.org>2020-01-29 09:33:08 -0700
committerCommit Bot <commit-bot@chromium.org>2020-01-31 14:48:08 +0000
commitb56a56eaba32f4d7d06750ffb3aed3f6e69b0d42 (patch)
treeb5c790ebdb658e057a9d05b49d6e05d467fd4637 /baseboard
parente600975e068dc2b2706eac2a11eb2d62564c1b4a (diff)
downloadchrome-ec-b56a56eaba32f4d7d06750ffb3aed3f6e69b0d42.tar.gz
ps8818: fix redriver configuration
in driver Added software IN_HPD control Added compile time optional debug in board specific tune function in usb_retimer Added gain control Added DP lane control BUG=b:146394157 BRANCH=none TEST=verify USB-C1 DP and USB connections Change-Id: Ida0cc243413b8fa469d3edb706040535e4a3f0e0 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2031645 Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'baseboard')
-rw-r--r--baseboard/zork/baseboard.c97
1 files changed, 97 insertions, 0 deletions
diff --git a/baseboard/zork/baseboard.c b/baseboard/zork/baseboard.c
index 3dcbd96560..ef55d12138 100644
--- a/baseboard/zork/baseboard.c
+++ b/baseboard/zork/baseboard.c
@@ -467,6 +467,102 @@ void bc12_interrupt(enum gpio_signal signal)
*/
/*
+ * PS8818 set mux tuning.
+ * Adds in board specific gain and DP lane count configuration
+ */
+static int ps8818_tune_mux(int port, mux_state_t mux_state)
+{
+ int rv = EC_SUCCESS;
+
+ /* USB specific config */
+ if (mux_state & USB_PD_MUX_USB_ENABLED) {
+ /* Boost the USB gain */
+ rv = ps8818_i2c_write(port,
+ PS8818_REG_PAGE1,
+ PS8818_REG1_APTX1EQ_10G_LEVEL,
+ PS8818_EQ_LEVEL_UP_21DB);
+ if (rv)
+ return rv;
+
+ rv = ps8818_i2c_write(port,
+ PS8818_REG_PAGE1,
+ PS8818_REG1_APTX2EQ_10G_LEVEL,
+ PS8818_EQ_LEVEL_UP_21DB);
+ if (rv)
+ return rv;
+
+ rv = ps8818_i2c_write(port,
+ PS8818_REG_PAGE1,
+ PS8818_REG1_APTX1EQ_5G_LEVEL,
+ PS8818_EQ_LEVEL_UP_21DB);
+ if (rv)
+ return rv;
+
+ rv = ps8818_i2c_write(port,
+ PS8818_REG_PAGE1,
+ PS8818_REG1_APTX2EQ_5G_LEVEL,
+ PS8818_EQ_LEVEL_UP_21DB);
+ if (rv)
+ return rv;
+
+ rv = ps8818_i2c_write(port,
+ PS8818_REG_PAGE1,
+ PS8818_REG1_CRX1EQ_10G_LEVEL,
+ PS8818_EQ_LEVEL_UP_21DB);
+ if (rv)
+ return rv;
+
+ rv = ps8818_i2c_write(port,
+ PS8818_REG_PAGE1,
+ PS8818_REG1_CRX2EQ_10G_LEVEL,
+ PS8818_EQ_LEVEL_UP_21DB);
+ if (rv)
+ return rv;
+
+ rv = ps8818_i2c_write(port,
+ PS8818_REG_PAGE1,
+ PS8818_REG1_CRX1EQ_5G_LEVEL,
+ PS8818_EQ_LEVEL_UP_21DB);
+ if (rv)
+ return rv;
+
+ rv = ps8818_i2c_write(port,
+ PS8818_REG_PAGE1,
+ PS8818_REG1_CRX2EQ_5G_LEVEL,
+ PS8818_EQ_LEVEL_UP_21DB);
+ if (rv)
+ return rv;
+ }
+
+ /* DP specific config */
+ if (mux_state & USB_PD_MUX_DP_ENABLED) {
+ int val;
+
+ /* Boost the DP gain */
+ rv = ps8818_i2c_write(port,
+ PS8818_REG_PAGE1,
+ PS8818_REG1_DPEQ_LEVEL,
+ PS8818_DPEQ_LEVEL_UP_21DB);
+ if (rv)
+ return rv;
+
+ /* Set DP lane count */
+ val = (mux_state & USB_PD_MUX_USB_ENABLED)
+ ? PS8818_LANE_COUNT_SET_2_LANE
+ : PS8818_LANE_COUNT_SET_4_LANE;
+
+ rv = ps8818_i2c_write(port,
+ PS8818_REG_PAGE2,
+ PS8818_REG2_LANE_COUNT_SET,
+ val);
+ if (rv)
+ return rv;
+ }
+
+ return rv;
+}
+
+/*
* FP5 is a true MUX but being used as a secondary MUX. Don't want to
* send FLIP or this will cause a double flip
*/
@@ -532,6 +628,7 @@ static int zork_c1_detect(int port, int err_if_power_off)
/* Main MUX is FP5, secondary MUX is PS8818 */
usb_muxes[USBC_PORT_C1].driver = &amd_fp5_usb_mux_driver;
usb_retimers[USBC_PORT_C1].driver = &ps8818_usb_retimer;
+ usb_retimers[USBC_PORT_C1].tune = &ps8818_tune_mux;
return rv;
}