diff options
| author | Rob Barnes <robbarnes@google.com> | 2021-01-08 10:41:06 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-14 01:27:24 +0000 |
| commit | 780bc3d88ac8cca02fa1a3566bdf61c1da7b47a0 (patch) | |
| tree | 2e140b382f74c68fc2f84a614e83f8b23196b648 /baseboard | |
| parent | facd61d5162903565ec1097236eef1c63c221fc9 (diff) | |
| download | chrome-ec-780bc3d88ac8cca02fa1a3566bdf61c1da7b47a0.tar.gz | |
guybrush: Ingest latest schematic changes
Swap ACOK_OD and EC_PWR_BTN_ODL.
Rename S5_PWROK, S0_PWROK_OD, PG_LPDDR4X_S3, and PCORE_EN_R.
BUG=None
BRANCH=None
TEST=Build
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I5498c5198a5ff981ca5f6fcd0df519f48368e5e7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2618385
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'baseboard')
| -rw-r--r-- | baseboard/guybrush/base_gpio.inc | 15 | ||||
| -rw-r--r-- | baseboard/guybrush/baseboard.h | 4 |
2 files changed, 10 insertions, 9 deletions
diff --git a/baseboard/guybrush/base_gpio.inc b/baseboard/guybrush/base_gpio.inc index 6b9e5bfe04..f6a9d48e1c 100644 --- a/baseboard/guybrush/base_gpio.inc +++ b/baseboard/guybrush/base_gpio.inc @@ -13,23 +13,23 @@ ALTERNATE( PIN_MASK(6, BIT(4) | BIT(5)), 0, MODULE_UART, 0) /* UART_EC_TX_GS /* Power Signals */ GPIO_INT(MECH_PWR_BTN_ODL, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW, power_button_interrupt) /* Mechanical Power Button */ -GPIO_INT(EC_PWR_BTN_ODL, PIN(0, 0), GPIO_INT_BOTH, power_button_interrupt) /* Power Button */ +GPIO_INT(EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) /* Power Button */ GPIO_INT(SLP_S3_L, PIN(6, 1), GPIO_INT_BOTH, power_signal_interrupt) /* Sleep S3 */ GPIO_INT(SLP_S5_L, PIN(7, 2), GPIO_INT_BOTH, power_signal_interrupt) /* Sleep S5 */ GPIO_INT(SLP_S3_S0I3_L, PIN(7, 4), GPIO_INT_BOTH, power_signal_interrupt) /* Sleep S0ix */ -GPIO_INT(S5_PWROK, PIN(C, 0), GPIO_INT_BOTH, power_signal_interrupt) /* S5 Power OK */ -GPIO_INT(S0_PWROK_OD, PIN(B, 6), GPIO_INT_BOTH, power_signal_interrupt) /* S0 Power OK */ -GPIO_INT(ACOK_OD, PIN(0, 1), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) /* AC Power Present */ +GPIO_INT(PG_PWR_S5, PIN(C, 0), GPIO_INT_BOTH, power_signal_interrupt) /* S5 Power OK */ +GPIO_INT(PG_PCORE_S0_R_OD, PIN(B, 6), GPIO_INT_BOTH, power_signal_interrupt) /* S0 Power OK */ +GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) /* AC Power Present */ GPIO_INT(EC_PCORE_INT_ODL, PIN(F, 0), GPIO_INT_BOTH | GPIO_PULL_UP, power_signal_interrupt) /* Power Core Interrupt */ GPIO_INT(PG_GROUPC_S0_OD, PIN(A, 3), GPIO_INT_BOTH, power_signal_interrupt) /* Power Group C S0 */ -GPIO_INT(PG_LPDDR4X_S3, PIN(9, 5), GPIO_INT_BOTH, power_signal_interrupt) /* Power Group LPDDR4 S3 */ +GPIO_INT(PG_LPDDR4X_S3_OD, PIN(9, 5), GPIO_INT_BOTH, power_signal_interrupt) /* Power Group LPDDR4 S3 */ GPIO(EN_PWR_S5, PIN(B, 7), GPIO_OUT_LOW) /* Enable S5 Power */ GPIO(EN_PWR_S0_R, PIN(F, 1), GPIO_OUT_LOW) GPIO(EN_PWR_Z1, PIN(8, 5), GPIO_OUT_LOW) /* Enable Z1 Power */ -GPIO(PCORE_EN_R, PIN(E, 1), GPIO_OUT_LOW) +GPIO(EN_PWR_PCORE_S0_R, PIN(E, 1), GPIO_OUT_LOW) ALTERNATE(/*MECH_PWR_BTN_ODL*/ PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) /* PSL - Mechanical Power Button */ ALTERNATE(/*LID_OPEN*/ PIN_MASK(0, BIT(2)), 0, MODULE_PMU, 0) /* PSL - Lid Open */ -ALTERNATE(/*ACOK_OD*/ PIN_MASK(0, BIT(1)), 0, MODULE_PMU, 0) /* PSL - AC Power Present */ +ALTERNATE(/*ACOK_OD*/ PIN_MASK(0, BIT(0)), 0, MODULE_PMU, 0) /* PSL - AC Power Present */ /* SOC Signals */ UNIMPLEMENTED(ENTERING_RW) /* GPIO_ENTERING_RW */ @@ -150,5 +150,6 @@ GPIO(EC_PS2_DAT, PIN(7, 0), GPIO_INPUT | GPIO_PULL_UP) GPIO(EC_PS2_RST, PIN(6, 2), GPIO_INPUT | GPIO_PULL_UP) GPIO(EC_GPIOB0, PIN(B, 0), GPIO_INPUT | GPIO_PULL_UP) GPIO(EC_GPIO81, PIN(8, 1), GPIO_INPUT | GPIO_PULL_UP) +GPIO(EC_FLPRG2, PIN(8, 6), GPIO_INPUT | GPIO_PULL_UP) GPIO(EC_PSL_GPO, PIN(D, 7), GPIO_INPUT | GPIO_PULL_UP) GPIO(EC_PWM7, PIN(6, 0), GPIO_INPUT | GPIO_PULL_UP) diff --git a/baseboard/guybrush/baseboard.h b/baseboard/guybrush/baseboard.h index 508dd03273..d45bc8d1ac 100644 --- a/baseboard/guybrush/baseboard.h +++ b/baseboard/guybrush/baseboard.h @@ -42,8 +42,8 @@ #define GPIO_PCH_SLP_S0_L GPIO_SLP_S3_S0I3_L #define GPIO_PCH_SLP_S3_L GPIO_SLP_S3_L #define GPIO_PCH_SLP_S5_L GPIO_SLP_S5_L -#define GPIO_S0_PGOOD GPIO_S0_PWROK_OD -#define GPIO_S5_PGOOD GPIO_S5_PWROK +#define GPIO_S0_PGOOD GPIO_PG_PCORE_S0_R_OD +#define GPIO_S5_PGOOD GPIO_PG_PWR_S5 #define GPIO_PCH_SYS_PWROK GPIO_EC_SOC_PWR_GOOD #define GPIO_SYS_RESET_L GPIO_EC_SYS_RST_L #define GPIO_EN_PWR_A GPIO_EN_PWR_Z1 |