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| author | Sooraj Govindan <sooraj.govindan@intel.com> | 2020-06-09 22:10:05 +0530 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-06-10 19:12:44 +0000 |
| commit | decb0d7a091edd18ff86e661a0a6922323a0e98b (patch) | |
| tree | 2771b3037a020cfc88027c0d2bead346afdaeecb /baseboard | |
| parent | 42cc4b011b641ad04bce7faba212d8d7110af439 (diff) | |
| download | chrome-ec-decb0d7a091edd18ff86e661a0a6922323a0e98b.tar.gz | |
dedede: Pull ALL_SYS_PWRGD low when SLP_S3_L is asserted
ALL_SYS_PWRGD is an AND of DRAM PGOOD, VCCST PGOOD, and
VCCIO_EXT PGOOD. SLP_S3_L is a qualifying input signal
to ALL_SYS_PWRGD logic. This patch ensure ALL_SYS_PWRGD
remains LOW during SLP_S3_L assertion.
BUG=b:158188385
BRANCH=none
TEST=run cold reboot tests
Signed-off-by: Sooraj Govindan <sooraj.govindan@intel.com>
Change-Id: I1bcfbab508220b78df5d21001ecfdb8dcb022022
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2237490
Tested-by: Sooraj Govindan <sooraj.govindan@intel.corp-partner.google.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'baseboard')
| -rw-r--r-- | baseboard/dedede/baseboard.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/baseboard/dedede/baseboard.c b/baseboard/dedede/baseboard.c index 7cccbff2ef..1995dba390 100644 --- a/baseboard/dedede/baseboard.c +++ b/baseboard/dedede/baseboard.c @@ -133,6 +133,12 @@ __override int intel_x86_get_pg_ec_dsw_pwrok(void) __override int intel_x86_get_pg_ec_all_sys_pwrgd(void) { /* + * SLP_S3_L is a qualifying input signal to ALL_SYS_PWRGD logic. + * So ensure ALL_SYS_PWRGD remains LOW during SLP_S3_L assertion. + */ + if (!gpio_get_level(GPIO_SLP_S3_L)) + return 0; + /* * ALL_SYS_PWRGD is an AND of DRAM PGOOD, VCCST PGOOD, and VCCIO_EXT * PGOOD. */ |