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| author | Poornima Tom <poornima.tom@intel.com> | 2020-09-04 20:08:51 +0530 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-11-03 18:10:24 +0000 |
| commit | 3b96973d29dd794cce7d7a32d16e2f531b97203a (patch) | |
| tree | 2d890f2d83958010c03deb6ccc30ea005ae890bb /board/adlrvpp_ite/board.h | |
| parent | ba9f1a8dd198b81fd7598326397c5c6dd746b808 (diff) | |
| download | chrome-ec-3b96973d29dd794cce7d7a32d16e2f531b97203a.tar.gz | |
ADLP-RVP: Config to enable TBT
BRANCH=None
BUG=b:171409539
TEST=Able to enter TBT mode
Signed-off-by: Poornima Tom <poornima.tom@intel.com>
Change-Id: I81fb01ac9e537ded25cfffc8a9691c173ed41a49
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2490900
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'board/adlrvpp_ite/board.h')
| -rw-r--r-- | board/adlrvpp_ite/board.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/board/adlrvpp_ite/board.h b/board/adlrvpp_ite/board.h index 6d5cf6d246..674b45aa69 100644 --- a/board/adlrvpp_ite/board.h +++ b/board/adlrvpp_ite/board.h @@ -134,6 +134,17 @@ #define TYPE_C_PORT_3_USB3_NUM (3+1) #endif +/* Enable VCONN */ +#define CONFIG_USBC_VCONN +#define CONFIG_USBC_VCONN_SWAP +#define PD_VCONN_SWAP_DELAY 5000 /* us */ + +/* Enabling Thunderbolt-compatible mode */ +#define CONFIG_USB_PD_TBT_COMPAT_MODE + +/* Enabling USB4 mode */ +#define CONFIG_USB_PD_USB4 + #ifndef __ASSEMBLER__ enum adlrvp_i2c_channel { |