diff options
author | martin yan <martin.yan@microchip.corp-partner.google.com> | 2021-05-07 11:47:43 -0400 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-06-30 23:42:28 +0000 |
commit | 0ed55efce6d9cf8f2831292f723206702e377fde (patch) | |
tree | d9211ae79b34740374877bf28513a73f0aee8109 /board/adlrvpp_mchp1727/build.mk | |
parent | 8ba01c565e1db7edc4338b01f3c3f07a3eea6fdc (diff) | |
download | chrome-ec-0ed55efce6d9cf8f2831292f723206702e377fde.tar.gz |
mchp: Add MEC1727 MECC board: adlrvpp_mchp1727
Add new board, adlrvpp_mchp1727 using MEC1727-SZ with integrated
512KB SPI flash and based upon the intelrvp baseboard.
BRANCH=none
BUG=b:190638460
TEST=Build MEC1727SZ MECC and ADL-P board.
Tested basic functions:
1: Power on sequence: G3->S5->S3->S0
2: ESPI enumeration / VW / FC
3: Temperature measurements
4: Smart battery information acquisition
5: Type C Port 0 and 1 - enter ALT mode
6: UART console
7: Sleep / wake / hibernate - woken by powerbtn
8: Powerbtn override
Signed-off-by: martin yan <martin.yan@microchip.corp-partner.google.com>
Change-Id: Ib474e1134a47a6fa219d741fc5c094cf2f4a560c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891908
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'board/adlrvpp_mchp1727/build.mk')
-rw-r--r-- | board/adlrvpp_mchp1727/build.mk | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/board/adlrvpp_mchp1727/build.mk b/board/adlrvpp_mchp1727/build.mk new file mode 100644 index 0000000000..2a056943d4 --- /dev/null +++ b/board/adlrvpp_mchp1727/build.mk @@ -0,0 +1,20 @@ +# -*- makefile -*- +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Intel ADL-P-RVP-MCHP1727 board-specific configuration +# + +# the IC is Microchip MEC172x 416 KB total SRAM +# MEC1723SZ variant is 144 pin, loads from external SPI flash +# MEC1727SZ variant is 144 pin, loads from 512KB internal SPI flash +# external SPI is 512KB +# clock is Internal ROSC +CHIP:=mchp +CHIP_FAMILY:=mec172x +CHIP_VARIANT:=mec1727sz +CHIP_SPI_SIZE_KB:=512 +BASEBOARD:=intelrvp + +board-y=board.o |