diff options
| author | Zick Wei <zick.wei@quanta.corp-partner.google.com> | 2022-05-04 16:41:11 +0800 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-05-17 07:10:04 +0000 |
| commit | cc7a3236a495ef14a29c8dd3858056c8db5c4d67 (patch) | |
| tree | f4443801c64fdc8d5307fa70999941b5ca02d1e3 /board/agah/gpio.inc | |
| parent | 3c952254ffcab60f8d77fb89561c97e0e4450a3e (diff) | |
| download | chrome-ec-cc7a3236a495ef14a29c8dd3858056c8db5c4d67.tar.gz | |
agah: update USB C2 port setting
Rename USBC1 to USBC2 to follow up schematic naming.
agah use below IC for TCPC and PPC on USB C2 port:
TCPC: RT1716
PPC: SYV682
BUG=b:218400524
BRANCH=none
TEST=make BOARD=agah
Signed-off-by: Zick Wei <zick.wei@quanta.corp-partner.google.com>
Change-Id: I672c6067cc09beff7b1d7e4a87912d5b8645128a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3627373
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Devin Lu <Devin.Lu@quantatw.com>
Diffstat (limited to 'board/agah/gpio.inc')
| -rw-r--r-- | board/agah/gpio.inc | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/board/agah/gpio.inc b/board/agah/gpio.inc index b2a53d1fbc..1121121e95 100644 --- a/board/agah/gpio.inc +++ b/board/agah/gpio.inc @@ -22,9 +22,10 @@ GPIO_INT(SYS_SLP_S0IX_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_ GPIO_INT(USB_C0_BC12_INT_ODL, PIN(C, 6), GPIO_INT_FALLING, bc12_interrupt) GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event) GPIO_INT(USB_C0_PPC_INT_ODL, PIN(6, 2), GPIO_INT_FALLING, ppc_interrupt) -GPIO_INT(USB_C1_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt) -GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, tcpc_alert_event) GPIO_INT(PG_PP3300_S5_OD, PIN(B, 4), GPIO_INT_BOTH | GPIO_PULL_UP, board_power_interrupt) +GPIO_INT(USB_C2_BC12_INT_ODL, PIN(8, 3), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C2_TCPC_INT_ODL, PIN(A, 7), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USB_C2_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt) /* USED GPIOs: */ GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) @@ -37,8 +38,8 @@ GPIO(EC_I2C_BAT_SCL, PIN(3, 3), GPIO_INPUT) GPIO(EC_I2C_BAT_SDA, PIN(3, 6), GPIO_INPUT) GPIO(EC_I2C_MISC_SCL_R, PIN(B, 3), GPIO_INPUT) GPIO(EC_I2C_MISC_SDA_R, PIN(B, 2), GPIO_INPUT) -GPIO(EC_I2C_USB_C1_SCL, PIN(9, 2), GPIO_INPUT) -GPIO(EC_I2C_USB_C1_SDA, PIN(9, 1), GPIO_INPUT) +GPIO(EC_I2C_USB_C2_SCL, PIN(9, 2), GPIO_INPUT) +GPIO(EC_I2C_USB_C2_SDA, PIN(9, 1), GPIO_INPUT) GPIO(EC_I2C_USB_C0_SCL, PIN(9, 0), GPIO_INPUT) GPIO(EC_I2C_USB_C0_SDA, PIN(8, 7), GPIO_INPUT) GPIO(EC_I2C_USBA_RT_SCL, PIN(E, 4), GPIO_INPUT) @@ -59,12 +60,12 @@ GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT) GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW) GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) GPIO(EC_USB_PCH_C0_OC_ODL, PIN(9, 4), GPIO_ODR_HIGH) -GPIO(EC_USB_PCH_C1_OC_ODL, PIN(9, 7), GPIO_ODR_HIGH) +GPIO(EC_USB_PCH_C2_OC_ODL, PIN(9, 7), GPIO_ODR_HIGH) GPIO(USB_C0_FRS_EN, PIN(A, 0), GPIO_OUT_LOW) -GPIO(EN_USB_C1_TCPC_RST_R, PIN(0, 2), GPIO_ODR_LOW) GPIO(VCCST_PWRGD_OD, PIN(A, 4), GPIO_ODR_LOW) GPIO(EN_USB_A_LOW_POWER, PIN(9, 3), GPIO_OUT_LOW) GPIO(PG_PP3300_S5_EC_SEQ_OD, PIN(B, 5), GPIO_OUT_LOW) +GPIO(USB_C2_FRS_EN, PIN(D, 4), GPIO_OUT_LOW) /* Barreljack */ GPIO(EN_PPVAR_BJ_ADP, PIN(A, 2), GPIO_OUT_LOW) @@ -119,10 +120,10 @@ ALTERNATE(PIN_MASK(D, 0x04), 0, MODULE_PMU, GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH) UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */ UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */ UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */ +UNUSED(PIN(0, 2)) /* GPIO02 */ UNUSED(PIN(6, 6)) /* GPIO66 */ UNUSED(PIN(5, 7)) /* GPIO57/SER_IRQ/ESPI_ALERT_L */ UNUSED(PIN(8, 1)) /* GPIO81 */ -UNUSED(PIN(D, 4)) /* GPIOD4 */ UNUSED(PIN(9, 5)) /* GPIO95 */ UNUSED(PIN(7, 3)) /* GPIO73 */ UNUSED(PIN(4, 1)) /* GPIO41 */ |