diff options
author | Shine Liu <shine.liu@intel.com> | 2018-11-28 11:29:00 -0800 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2019-01-11 13:32:22 -0800 |
commit | 7b99b74ba5463c886200ea827579f7ac1b6a35d2 (patch) | |
tree | 63fe59b9849a859b97dc9f959239040ab4ad4c02 /board/arcada_ish/board.c | |
parent | 27a4e32b5f7cadc251624da08fbab870f9e7ebc8 (diff) | |
download | chrome-ec-7b99b74ba5463c886200ea827579f7ac1b6a35d2.tar.gz |
ISH: Arcada ISH initial enabling
Add arcada_ish board support
BRANCH=none
BUG=b:120295222
TEST=Tested on Arcada EVT board, ISH firmware is running and UART
console input/output is working.
Change-Id: If1073287d45738689db9f1ac005e107a3445320a
Signed-off-by: Shine Liu <shine.liu@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/1354302
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Li1 Feng <li1.feng@intel.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'board/arcada_ish/board.c')
-rwxr-xr-x | board/arcada_ish/board.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/board/arcada_ish/board.c b/board/arcada_ish/board.c new file mode 100755 index 0000000000..0225deb370 --- /dev/null +++ b/board/arcada_ish/board.c @@ -0,0 +1,35 @@ +/* Copyright 2018 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Arcada ISH board-specific configuration */ + +#include "console.h" +#include "gpio.h" +#include "host_command.h" +#include "i2c.h" + +#include "gpio_list.h" /* has to be included last */ +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) + +/* I2C port map */ +const struct i2c_port_t i2c_ports[] = { + {"sensor", I2C_PORT_SENSOR, 1000, GPIO_ISH_I2C0_SCL, GPIO_ISH_I2C0_SDA} +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +/* dummy functions to remove 'undefined' symbol link error for acpi.o + * due to CONFIG_LPC flag + */ +#ifdef CONFIG_HOSTCMD_LPC +int lpc_query_host_event_state(void) +{ + return 0; +} + +void lpc_set_acpi_status_mask(uint8_t mask) +{ +} +#endif |