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authorCaveh Jalali <caveh@chromium.org>2018-06-06 21:22:58 -0700
committerchrome-bot <chrome-bot@chromium.org>2018-06-12 00:36:25 -0700
commitb8878265912cdef825be7ae2ad7ae5e507e5a3b1 (patch)
treefdbad9c38d6c1f1e62b79c8bcd09c7b9e98a426e /board/atlas
parent084fb77a796e2a33e68435be52f18ce63c48d62d (diff)
downloadchrome-ec-b8878265912cdef825be7ae2ad7ae5e507e5a3b1.tar.gz
atlas: set PROCHOT# GPIO pin to 1.8v
set the input level for the PROCHOT# signal to 1.8v. the signal is actually pulled up to 1.0v on the board so it has always read as 0 with the default 3.3v GPIO setting now, with the 1.8v pin configuration, it actually reads as a 1: > gpioget ec_prochot_odl 1 EC_PROCHOT_ODL > BUG=b:109846359 BRANCH=none TEST=read back gpio pin state from EC console Change-Id: Ibd25fdb10b15e42a03e460a43c118d1bc8971281 Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1090319 Commit-Ready: caveh jalali <caveh@chromium.org> Tested-by: caveh jalali <caveh@chromium.org> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Diffstat (limited to 'board/atlas')
-rw-r--r--board/atlas/gpio.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/atlas/gpio.inc b/board/atlas/gpio.inc
index 1d4777bcb1..215872571e 100644
--- a/board/atlas/gpio.inc
+++ b/board/atlas/gpio.inc
@@ -30,7 +30,7 @@ GPIO(RSMRST_L, PIN(3, 7), GPIO_OUT_LOW) /* SOC Resume Reset */
GPIO(EC_PCH_PWR_BTN_L, PIN(C, 1), GPIO_OUT_HIGH) /* Power button to SOC */
GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) /* RTC Reset (broken) */
GPIO(EC_PCH_WAKE_L, PIN(7, 4), GPIO_ODR_HIGH) /* PCH wake */
-GPIO(EC_PROCHOT_ODL, PIN(3, 4), GPIO_INPUT) /* SOC PROCHOT# */
+GPIO(EC_PROCHOT_ODL, PIN(3, 4), GPIO_INPUT | GPIO_SEL_1P8V) /* SOC PROCHOT# */
GPIO(SYS_RESET_L, PIN(0, 2), GPIO_ODR_HIGH) /* SOC reset */
GPIO(USB_C0_DP_HPD, PIN(C, 5), GPIO_INPUT) /* C0 Hotplug Detect */
GPIO(USB_C1_DP_HPD, PIN(C, 6), GPIO_INPUT) /* C1 Hotplug Detect */