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authorScott Chao <scott_chao@wistron.corp-partner.google.com>2023-02-14 13:04:36 +0800
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2023-02-20 06:05:31 +0000
commitca22ad5e5b319946945d32ed3322a4de7a4a6c43 (patch)
tree4d20281251525e1d2fbac779aa1f356584e114ea /board/aurash/sensors.c
parentd29366ee25e0f7550c769b10ddaadae0687da2f3 (diff)
downloadchrome-ec-ca22ad5e5b319946945d32ed3322a4de7a4a6c43.tar.gz
aurash: update EC related function
- Support power on by HDMI/ DP monitor. - Remove third type-c port. - Update GPIO setting according to schematic. - Update power_monitor function according to aurash design. - Update ADC channel setting. - Update Barrel adapter to 90w and 135w. - Remove all fan related function. - Update thermal shutdown point from thermal team request. BUG=b:269212574 BRANCH=none TEST=make buildall Change-Id: Ic268884c9e633e65774394445ca24bcabf23614f Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4248461 Reviewed-by: Ricky Chang <rickytlchang@chromium.org> Commit-Queue: Ricky Chang <rickytlchang@chromium.org>
Diffstat (limited to 'board/aurash/sensors.c')
-rw-r--r--board/aurash/sensors.c70
1 files changed, 29 insertions, 41 deletions
diff --git a/board/aurash/sensors.c b/board/aurash/sensors.c
index 211faace1c..517a6ed905 100644
--- a/board/aurash/sensors.c
+++ b/board/aurash/sensors.c
@@ -12,8 +12,8 @@
/* ADC configuration */
const struct adc_t adc_channels[] = {
- [ADC_TEMP_SENSOR_1_CPU] = {
- .name = "TEMP_CPU",
+ [ADC_TEMP_SENSOR_1_SSD] = {
+ .name = "TEMP_SSD",
.input_ch = NPCX_ADC_CH0,
.factor_mul = ADC_MAX_VOLT,
.factor_div = ADC_READ_MAX + 1,
@@ -26,13 +26,6 @@ const struct adc_t adc_channels[] = {
.factor_div = ADC_READ_MAX + 1,
.shift = 0,
},
- [ADC_TEMP_SENSOR_3_WIFI] = {
- .name = "TEMP_WIFI",
- .input_ch = NPCX_ADC_CH6,
- .factor_mul = ADC_MAX_VOLT,
- .factor_div = ADC_READ_MAX + 1,
- .shift = 0,
- },
[ADC_TEMP_SENSOR_4_DIMM] = {
.name = "TEMP_DIMM",
.input_ch = NPCX_ADC_CH7,
@@ -46,11 +39,11 @@ const struct adc_t adc_channels[] = {
.factor_mul = ADC_MAX_VOLT * 39,
.factor_div = (ADC_READ_MAX + 1) * 5,
},
- [ADC_PPVAR_IMON] = { /* 872.3 mV/A */
+ [ADC_PPVAR_IMON] = { /* 20/(20+8.66)*50/200 current divider */
.name = "PPVAR_IMON",
.input_ch = NPCX_ADC_CH3,
.factor_mul = ADC_MAX_VOLT * 1433,
- .factor_div = (ADC_READ_MAX + 1) * 1250,
+ .factor_div = (ADC_READ_MAX + 1) * 250,
},
};
@@ -58,18 +51,14 @@ BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
/* Temperature sensor configuration */
const struct temp_sensor_t temp_sensors[] = {
- [TEMP_SENSOR_1_CPU] = { .name = "CPU",
+ [TEMP_SENSOR_1_SSD] = { .name = "SSD",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
- .idx = ADC_TEMP_SENSOR_1_CPU },
+ .idx = ADC_TEMP_SENSOR_1_SSD },
[TEMP_SENSOR_2_CPU_VR] = { .name = "CPU VR",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
.idx = ADC_TEMP_SENSOR_2_CPU_VR },
- [TEMP_SENSOR_3_WIFI] = { .name = "WIFI",
- .type = TEMP_SENSOR_TYPE_BOARD,
- .read = get_temp_3v3_30k9_47k_4050b,
- .idx = ADC_TEMP_SENSOR_3_WIFI },
[TEMP_SENSOR_4_DIMM] = { .name = "DIMM",
.type = TEMP_SENSOR_TYPE_BOARD,
.read = get_temp_3v3_30k9_47k_4050b,
@@ -77,38 +66,37 @@ const struct temp_sensor_t temp_sensors[] = {
};
BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
-/*
- * TODO(b/180681346): update for Alder Lake/brya
- *
- * Tiger Lake specifies 100 C as maximum TDP temperature. THRMTRIP# occurs at
- * 130 C. However, sensor is located next to DDR, so we need to use the lower
- * DDR temperature limit (85 C)
- */
-/*
- * TODO(b/202062363): Remove when clang is fixed.
- */
-#define THERMAL_CPU \
- { \
- .temp_host = { \
- [EC_TEMP_THRESH_HIGH] = C_TO_K(70), \
- [EC_TEMP_THRESH_HALT] = C_TO_K(80), \
- }, \
- .temp_host_release = { \
- [EC_TEMP_THRESH_HIGH] = C_TO_K(65), \
- }, \
- .temp_fan_off = C_TO_K(35), \
- .temp_fan_max = C_TO_K(50), \
+#define THERMAL_SSD \
+ { \
+ .temp_host = { \
+ [EC_TEMP_THRESH_HALT] = C_TO_K(100), \
+ }, \
+ }
+__maybe_unused static const struct ec_thermal_config thermal_ssd = THERMAL_SSD;
+
+#define THERMAL_CPU \
+ { \
+ .temp_host = { \
+ [EC_TEMP_THRESH_HALT] = C_TO_K(125), \
+ }, \
}
__maybe_unused static const struct ec_thermal_config thermal_cpu = THERMAL_CPU;
+#define THERMAL_DIMM \
+ { \
+ .temp_host = { \
+ [EC_TEMP_THRESH_HALT] = C_TO_K(95), \
+ }, \
+ }
+__maybe_unused static const struct ec_thermal_config thermal_dimm =
+ THERMAL_DIMM;
/*
* TODO(b/197478860): add the thermal sensor setting
*/
/* this should really be "const" */
struct ec_thermal_config thermal_params[] = {
- [TEMP_SENSOR_1_CPU] = THERMAL_CPU,
+ [TEMP_SENSOR_1_SSD] = THERMAL_SSD,
[TEMP_SENSOR_2_CPU_VR] = THERMAL_CPU,
- [TEMP_SENSOR_3_WIFI] = THERMAL_CPU,
- [TEMP_SENSOR_4_DIMM] = THERMAL_CPU,
+ [TEMP_SENSOR_4_DIMM] = THERMAL_DIMM,
};
BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);