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authorScott Collyer <scollyer@google.com>2021-04-05 19:02:03 -0700
committerCommit Bot <commit-bot@chromium.org>2021-04-12 16:21:07 +0000
commitee47fdb52a18fff8d34ebb372c076787017e0476 (patch)
tree0e6bba6c7246fff110a029308b614d917eac33d4 /board/baklava/board.h
parent190e9c6154bfdfe7290c0e93733384439c32923e (diff)
downloadchrome-ec-ee47fdb52a18fff8d34ebb372c076787017e0476.tar.gz
baklava: Starting image (quiche copy)
This CL is the starting image for baklava which is a quiche varaint. The only changes made are updating the year and board name. The follow on CL contains changes relative to quiche. BUG=b:184595837 BRANCH=quiche TEST=make -j BOARD=baklava Signed-off-by: Scott Collyer <scollyer@google.com> Change-Id: I62f1b6cd710f272833a97f50dc7fe7e1ac27b85e Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2806185 Tested-by: Scott Collyer <scollyer@chromium.org> Reviewed-by: Diana Z <dzigterman@chromium.org> Commit-Queue: Diana Z <dzigterman@chromium.org>
Diffstat (limited to 'board/baklava/board.h')
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diff --git a/board/baklava/board.h b/board/baklava/board.h
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+++ b/board/baklava/board.h
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+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Baklava board configuration */
+
+#ifndef __CROS_EC_BOARD_H
+#define __CROS_EC_BOARD_H
+
+/* Baseboard features */
+#include "baseboard.h"
+
+/* Optional features */
+#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands while in dev. */
+
+/* USB Type C and USB PD defines */
+#define USB_PD_PORT_HOST 0
+#define USB_PD_PORT_DP 1
+#define USB_PD_PORT_USB3 2
+
+/*
+ * The host (C0) and display (C1) usbc ports are usb-pd capable. There is
+ * also a type-c only port (C2). C2 must be accounted for in PORT_MAX_COUNT so
+ * the PPC config table is correctly sized and the PPC driver can be used to
+ * control VBUS on/off.
+ */
+#define CONFIG_USB_PD_PORT_MAX_COUNT 3
+#define CONFIG_USB_MUX_PS8822
+
+#define CONFIG_USB_PID 0x5048
+#define CONFIG_USB_BCD_DEV 0x0001 /* v 0.01 */
+#define CONFIG_USB_PD_IDENTITY_HW_VERS 1
+#define CONFIG_USB_PD_IDENTITY_SW_VERS 1
+
+/* I2C port names */
+#define I2C_PORT_I2C1 0
+#define I2C_PORT_I2C2 1
+#define I2C_PORT_I2C3 2
+
+/* Required symbolic I2C port names */
+#define I2C_PORT_MP4245 I2C_PORT_I2C3
+#define I2C_PORT_EEPROM I2C_PORT_I2C3
+#define MP4245_I2C_ADDR_FLAGS MP4245_I2C_ADDR_0_FLAGS
+
+#ifndef __ASSEMBLER__
+
+#include "registers.h"
+
+#define GPIO_DP_HPD GPIO_DDI_MST_IN_HPD
+
+#define GPIO_TRIGGER_1 GPIO_TP41
+#define GPIO_TRIGGER_2 GPIO_TP73
+
+enum debug_gpio {
+ TRIGGER_1 = 0,
+ TRIGGER_2,
+};
+
+/*
+ * Function used to control GPIO signals as a timing marker. This is intended to
+ * be used for development/debugging purposes.
+ *
+ * @param trigger GPIO debug signal selection
+ * @param level desired level of the debug gpio signal
+ * @param pulse_usec pulse width if non-zero
+ */
+void board_debug_gpio(enum debug_gpio trigger, int level, int pulse_usec);
+
+/*
+ * Function called in power on case to enable usbc related interrupts
+ */
+void board_enable_usbc_interrupts(void);
+
+/*
+ * Function called in power off case to disable usbc related interrupts
+ */
+void board_disable_usbc_interrupts(void);
+
+#endif /* !__ASSEMBLER__ */
+
+#endif /* __CROS_EC_BOARD_H */