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authorSteven Jian <steven.jian@intel.com>2015-04-01 01:25:42 +0800
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-05-27 03:58:16 +0000
commit937cc8a64e5971def21303e7a19a4ad9553e0ace (patch)
tree321543152e0c4d61e686ca7b92edd0d027bb168b /board/bds/gpio.inc
parente216906c9327655d71b8758b7f11c2f744e55018 (diff)
downloadchrome-ec-937cc8a64e5971def21303e7a19a4ad9553e0ace.tar.gz
mec1322: Simplify GPIO lists
Our existing GPIO macros use port# / gpio#, but the concept of different GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros for chips which do not have distinct GPIO ports. BUG=None BRANCH=None TEST=make buildall -j Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b Signed-off-by: Steven Jian <steven.jian@intel.com> Reviewed-on: https://chromium-review.googlesource.com/262841 Reviewed-by: Anton Staaf <robotboy@chromium.org>
Diffstat (limited to 'board/bds/gpio.inc')
-rw-r--r--board/bds/gpio.inc12
1 files changed, 6 insertions, 6 deletions
diff --git a/board/bds/gpio.inc b/board/bds/gpio.inc
index b1b13057aa..7de4fb6ca7 100644
--- a/board/bds/gpio.inc
+++ b/board/bds/gpio.inc
@@ -6,8 +6,8 @@
*/
/* Recovery signal from DOWN button */
-GPIO(RECOVERY_L, D, 1, GPIO_PULL_UP)
-GPIO(DEBUG_LED, A, 7, GPIO_OUT_LOW)
+GPIO(RECOVERY_L, PIN(D, 1), GPIO_PULL_UP)
+GPIO(DEBUG_LED, PIN(A, 7), GPIO_OUT_LOW)
/*
* Signals which aren't implemented on BDS but we'll emulate anyway, to
@@ -16,7 +16,7 @@ GPIO(DEBUG_LED, A, 7, GPIO_OUT_LOW)
UNIMPLEMENTED(WP) /* Write protect input */
UNIMPLEMENTED(ENTERING_RW) /* EC entering RW code */
-ALTERNATE(A, 0x03, 1, MODULE_UART, 0) /* UART0 */
-ALTERNATE(G, 0x40, 3, MODULE_I2C, 0) /* I2C5 SCL */
-ALTERNATE(G, 0x80, 3, GPIO_OPEN_DRAIN, 0) /* I2C5 SDA */
-ALTERNATE(B, 0x03, 1, MODULE_UART, 0) /* UART1 */
+ALTERNATE(PIN_MASK(A, 0x03), 1, MODULE_UART, 0) /* UART0 */
+ALTERNATE(PIN_MASK(G, 0x40), 3, MODULE_I2C, 0) /* I2C5 SCL */
+ALTERNATE(PIN_MASK(G, 0x80), 3, GPIO_OPEN_DRAIN, 0) /* I2C5 SDA */
+ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, 0) /* UART1 */