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authorRandall Spangler <rspangler@chromium.org>2012-03-02 10:16:43 -0800
committerRandall Spangler <rspangler@chromium.org>2012-03-05 09:23:51 -0800
commit2464e96469a816cf4144da4f0e7b957372181325 (patch)
treecb53b80bc76a6536cade7283891aaeff3e3264fc /board/bds
parent2ae113da5510fed2f0f24743802f5de023473256 (diff)
downloadchrome-ec-2464e96469a816cf4144da4f0e7b957372181325.tar.gz
Add SMI/SCI support
BUG=chrome-os-partner:8277 TEST=manual On EC console: hostevent set 0x1e From root shell: ectool eventget --> should return 0x1e ectool eventclear 0x02 ectool eventget --> should return 0x1c ectool queryec --> should return event 3 ectool queryec --> should return event 4 ectool queryec --> should return event 5 ectool queryec --> should return no event pending ectool eventsetsmimask 0x1200 ectool eventsetscimask 0x0034 ectool eventgetsmimask --> should return 0x1200 ectool eventgetscimask --> should return 0x0034 On EC console: hostevent --> should show raw=0 SMI mask = 0x1200 SCI mask = 0x34 Change-Id: I33042fa80c0b148cd63209a94a184af493e25ed3
Diffstat (limited to 'board/bds')
-rw-r--r--board/bds/board.c1
-rw-r--r--board/bds/board.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/board/bds/board.c b/board/bds/board.c
index 2e2a1915f6..8fcb7f791e 100644
--- a/board/bds/board.c
+++ b/board/bds/board.c
@@ -66,6 +66,7 @@ const struct gpio_info gpio_list[GPIO_COUNT] = {
GPIO_SIGNAL_NOT_IMPLEMENTED("PCH_DPWROK"),
GPIO_SIGNAL_NOT_IMPLEMENTED("PCH_PWROK"),
GPIO_SIGNAL_NOT_IMPLEMENTED("PCH_RSMRSTn"),
+ GPIO_SIGNAL_NOT_IMPLEMENTED("PCH_SMIn"),
GPIO_SIGNAL_NOT_IMPLEMENTED("PCH_SUSACKn"),
GPIO_SIGNAL_NOT_IMPLEMENTED("SHUNT_1_5V_DDR"),
};
diff --git a/board/bds/board.h b/board/bds/board.h
index dc96aa73c2..de641f0b7f 100644
--- a/board/bds/board.h
+++ b/board/bds/board.h
@@ -117,6 +117,7 @@ enum gpio_signal {
GPIO_PCH_DPWROK, /* DPWROK signal to PCH */
GPIO_PCH_PWROK, /* PWROK / APWROK signals to PCH */
GPIO_PCH_RSMRSTn, /* Reset PCH resume power plane logic */
+ GPIO_PCH_SMIn, /* System management interrupt to PCH */
GPIO_PCH_SUSACKn, /* Acknowledge PCH SUSWARN# signal */
GPIO_SHUNT_1_5V_DDR, /* Shunt +1.5V_DDR; may also enable +3V_TP
* depending on stuffing. */