diff options
| author | Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com> | 2021-03-02 17:17:02 +0530 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-03-03 00:44:34 +0000 |
| commit | 7fa8dd50245b52ccdcde07719525e94fc8e053f0 (patch) | |
| tree | 192fc89c1b48cd06ba9b117c91daa9cfece890eb /board/boldar/gpio.inc | |
| parent | 37ba1a68353bcc32520f82286c30647188558350 (diff) | |
| download | chrome-ec-7fa8dd50245b52ccdcde07719525e94fc8e053f0.tar.gz | |
boldar: change in EC GPIO_USB_C0_RT_RST_ODL pin direction.
As per the schematics, GPIO_USB_C0_RT_RST_ODL pin attribute changed
from GPIO_INPUT to GPIO_ODR_LOW i.e same as GPIO_USB_C1_RT_RST_ODL.
BRANCH=none
BUG=none
TEST=Verified the retimer functionality by connecting usb 3.0 pen
drive.
Change-Id: I48cf59d544d2cbd19a673aa23923b266e44ef95d
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2726058
Reviewed-by: Sooraj Govindan <sooraj.govindan@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'board/boldar/gpio.inc')
| -rw-r--r-- | board/boldar/gpio.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/boldar/gpio.inc b/board/boldar/gpio.inc index b4a6622e1e..f41d198df5 100644 --- a/board/boldar/gpio.inc +++ b/board/boldar/gpio.inc @@ -84,10 +84,12 @@ GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) /* USB and USBC Signals */ GPIO(EN_PP5000_USBA, PIN(C, 6), GPIO_OUT_LOW) /* Enable USB-A charging - all ports */ GPIO(USB_A_LOW_PWR_OD, PIN(6, 6), GPIO_ODR_LOW) /* Don't limit USB-A charging by default - all ports */ +GPIO(USB_C0_RT_RST_ODL, PIN(4, 1), GPIO_ODR_LOW) /* RST to Burnside bridge */ GPIO(USB_C1_RT_RST_ODL, PIN(8, 3), GPIO_ODR_LOW) GPIO(USB_C0_OC_ODL, PIN(B, 1), GPIO_ODR_HIGH) GPIO(USB_C1_OC_ODL, PIN(5, 0), GPIO_ODR_HIGH) /* There is currently no need to service this interrupt. */ +GPIO(USB_C0_RT_INT_ODL, PIN(F, 2), GPIO_INPUT) GPIO(USB_C1_RT_INT_ODL, PIN(F, 3), GPIO_INPUT) /* Don't have a load switch for retimer */ @@ -106,8 +108,6 @@ GPIO(M2_SSD_PLA, PIN(7, 0), GPIO_INPUT) /* SSD power-loss acknowledgment */ GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) /* Case Closed Debug Mode */ GPIO(EC_SLP_S0IX, PIN(7, 2), GPIO_INPUT | GPIO_PULL_UP) -GPIO(USB_C0_RT_RST_ODL, PIN(4, 1), GPIO_INPUT) /* RST to Burnside bridge */ -GPIO(USB_C0_RT_INT_ODL, PIN(F, 2), GPIO_INPUT) GPIO(CATERR_L, PIN(3, 4), GPIO_INPUT) /* Catastrophic error */ GPIO(EC_ESPI_ALERT_L, PIN(5, 7), GPIO_INPUT | GPIO_SEL_1P8V) |