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authorZhuohao Lee <zhuohao@chromium.org>2021-08-24 20:45:28 +0800
committerCommit Bot <commit-bot@chromium.org>2021-08-25 08:36:52 +0000
commit5837e32e2dfbbbe50e5ba51eb6464b0c2b6f4103 (patch)
tree7cd3ada307c0a4d5b6c1910567feb2f7222b8bd8 /board/brask/usbc_config.c
parent5edd11b4edbc37979efb9c7cc73af9b7e4fc4a01 (diff)
downloadchrome-ec-5837e32e2dfbbbe50e5ba51eb6464b0c2b6f4103.tar.gz
brask: modify the usbc setting
There are 3 usb typec ports in the brask. The configuration listed below: Port 0: TCPC NCT3808-1, TCPPC SYV682B, Burnside Bridge retimer. Port 1: TCPC RT1716, TCPPC SYV682B, Kandou KB8002. Port 2: TCPC NCT3808-2, TCPPC SYV682B, Burnside Bridge retimer. In order to support the above configuration, this patch modifies: 1. use syv682v instead of using nv20p3483. 2. use rt1716 instead of using ps8815. 3. use kb800x retimer. 4. remove the fw_config because we don't need it to switch the different DBs. BUG=b:191637086 BRANCH=None TEST=make BOARD=brask Change-Id: Ie09aef9dc7cc7a532b34d86ea022127099f7735e Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3115807 Reviewed-by: caveh jalali <caveh@chromium.org> Reviewed-by: Boris Mittelberg <bmbm@google.com>
Diffstat (limited to 'board/brask/usbc_config.c')
-rw-r--r--board/brask/usbc_config.c114
1 files changed, 27 insertions, 87 deletions
diff --git a/board/brask/usbc_config.c b/board/brask/usbc_config.c
index 854ed0081c..d60371e348 100644
--- a/board/brask/usbc_config.c
+++ b/board/brask/usbc_config.c
@@ -10,14 +10,13 @@
#include "compile_time_macros.h"
#include "console.h"
#include "driver/bc12/pi3usb9201_public.h"
-#include "driver/ppc/nx20p348x.h"
#include "driver/ppc/syv682x_public.h"
#include "driver/retimer/bb_retimer_public.h"
+#include "driver/retimer/kb800x.h"
#include "driver/tcpm/nct38xx.h"
-#include "driver/tcpm/ps8xxx_public.h"
+#include "driver/tcpm/rt1715.h"
#include "driver/tcpm/tcpci.h"
#include "ec_commands.h"
-#include "fw_config.h"
#include "gpio.h"
#include "gpio_signal.h"
#include "hooks.h"
@@ -52,11 +51,9 @@ const struct tcpc_config_t tcpc_config[] = {
.bus_type = EC_BUS_TYPE_I2C,
.i2c_info = {
.port = I2C_PORT_USB_C1_TCPC,
- .addr_flags = PS8751_I2C_ADDR1_FLAGS,
+ .addr_flags = RT1715_I2C_ADDR_FLAGS,
},
- .drv = &ps8xxx_tcpm_drv,
- .flags = TCPC_FLAGS_TCPCI_REV2_0 |
- TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V,
+ .drv = &rt1715_tcpm_drv,
},
[USBC_PORT_C2] = {
.bus_type = EC_BUS_TYPE_I2C,
@@ -79,17 +76,12 @@ struct ppc_config_t ppc_chips[] = {
.drv = &syv682x_drv,
},
[USBC_PORT_C1] = {
- /* Compatible with Silicon Mitus SM536A0 */
.i2c_port = I2C_PORT_USB_C1_PPC,
- .i2c_addr_flags = NX20P3483_ADDR2_FLAGS,
- .drv = &nx20p348x_drv,
+ .i2c_addr_flags = SYV682X_ADDR0_FLAGS,
+ .drv = &syv682x_drv,
},
[USBC_PORT_C2] = {
.i2c_port = I2C_PORT_USB_C0_C2_PPC,
- /*
- * b/179987870
- * schematics I2C map says ADDR3
- */
.i2c_addr_flags = SYV682X_ADDR2_FLAGS,
.drv = &syv682x_drv,
},
@@ -104,23 +96,17 @@ static const struct usb_mux usbc0_tcss_usb_mux = {
.driver = &virtual_usb_mux_driver,
.hpd_update = &virtual_hpd_update,
};
+static const struct usb_mux usbc1_tcss_usb_mux = {
+ .usb_port = USBC_PORT_C1,
+ .driver = &virtual_usb_mux_driver,
+ .hpd_update = &virtual_hpd_update,
+};
static const struct usb_mux usbc2_tcss_usb_mux = {
.usb_port = USBC_PORT_C2,
.driver = &virtual_usb_mux_driver,
.hpd_update = &virtual_hpd_update,
};
-/*
- * USB3 DB mux configuration - the top level mux still needs to be set
- * to the virtual_usb_mux_driver so the AP gets notified of mux changes
- * and updates the TCSS configuration on state changes.
- */
-static const struct usb_mux usbc1_usb3_db_retimer = {
- .usb_port = USBC_PORT_C1,
- .driver = &tcpci_tcpm_usb_mux_driver,
- .hpd_update = &ps8xxx_tcpc_update_hpd_status,
-};
-
const struct usb_mux usb_muxes[] = {
[USBC_PORT_C0] = {
.usb_port = USBC_PORT_C0,
@@ -130,11 +116,15 @@ const struct usb_mux usb_muxes[] = {
.next_mux = &usbc0_tcss_usb_mux,
},
[USBC_PORT_C1] = {
- /* PS8815 DB */
.usb_port = USBC_PORT_C1,
- .driver = &virtual_usb_mux_driver,
- .hpd_update = &virtual_hpd_update,
- .next_mux = &usbc1_usb3_db_retimer,
+ /* TODO(b/197505149): need to fix the build error and
+ * clarify how to set the usb_ls_en_gpio and
+ * retimer_rst_gpio in the same array.
+ */
+ /*.driver = &kb800x_usb_mux_driver, */
+ .i2c_port = I2C_PORT_USB_C1_MUX,
+ .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR,
+ .next_mux = &usbc1_tcss_usb_mux,
},
[USBC_PORT_C2] = {
.usb_port = USBC_PORT_C2,
@@ -185,32 +175,9 @@ struct ioexpander_config_t ioex_config[] = {
.drv = &nct38xx_ioexpander_drv,
.flags = IOEX_FLAGS_DISABLED,
},
- [IOEX_ID_1_C0_NCT38XX] = {
- .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC,
- .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
- .drv = &nct38xx_ioexpander_drv,
- .flags = IOEX_FLAGS_DISABLED,
- },
- [IOEX_ID_1_C2_NCT38XX] = {
- .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC,
- .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS,
- .drv = &nct38xx_ioexpander_drv,
- .flags = IOEX_FLAGS_DISABLED,
- },
};
BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT);
-void config_usb_db_type(void)
-{
- enum ec_cfg_usb_db_type db_type = ec_cfg_usb_db_type();
-
- /*
- * TODO(b/180434685): implement multiple DB types
- */
-
- CPRINTS("Configured USB DB type number is %d", db_type);
-}
-
__override int bb_retimer_power_enable(const struct usb_mux *me, bool enable)
{
enum ioex_signal rst_signal;
@@ -273,9 +240,7 @@ void board_reset_pd_mcu(void)
*/
gpio_set_level(tcpc_rst, 0);
- if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
- gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0);
- }
+ gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0);
/*
* delay for power-on to reset-off and min. assertion time
@@ -284,9 +249,7 @@ void board_reset_pd_mcu(void)
msleep(20);
gpio_set_level(tcpc_rst, 1);
- if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
- gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
- }
+ gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
/* wait for chips to come up */
@@ -321,15 +284,8 @@ static void board_tcpc_init(void)
/* Enable TCPC interrupts. */
gpio_enable_interrupt(GPIO_USB_C0_C2_TCPC_INT_ODL);
- /* Enable BC1.2 interrupts. */
- gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL);
- gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL);
-
- if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
- gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
- gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
- gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL);
- }
+ gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
+ gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
}
DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET);
@@ -340,8 +296,7 @@ uint16_t tcpc_get_alert_status(void)
if (gpio_get_level(GPIO_USB_C0_C2_TCPC_INT_ODL) == 0)
status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_2;
- if ((ec_cfg_usb_db_type() != DB_USB_ABSENT) &&
- gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0)
+ if (gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0)
status |= PD_STATUS_TCPC_ALERT_1;
return status;
@@ -351,8 +306,7 @@ int ppc_get_alert_status(int port)
{
if (port == USBC_PORT_C0)
return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0;
- else if ((port == USBC_PORT_C1) &&
- (ec_cfg_usb_db_type() != DB_USB_ABSENT))
+ else if (port == USBC_PORT_C1)
return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0;
else if (port == USBC_PORT_C2)
return gpio_get_level(GPIO_USB_C2_PPC_INT_ODL) == 0;
@@ -366,8 +320,6 @@ void tcpc_alert_event(enum gpio_signal signal)
schedule_deferred_pd_interrupt(USBC_PORT_C0);
break;
case GPIO_USB_C1_TCPC_INT_ODL:
- if (ec_cfg_usb_db_type() == DB_USB_ABSENT)
- break;
schedule_deferred_pd_interrupt(USBC_PORT_C1);
break;
default:
@@ -382,8 +334,6 @@ void bc12_interrupt(enum gpio_signal signal)
task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12);
break;
case GPIO_USB_C1_BC12_INT_ODL:
- if (ec_cfg_usb_db_type() == DB_USB_ABSENT)
- break;
task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12);
break;
case GPIO_USB_C2_BC12_INT_ODL:
@@ -401,14 +351,7 @@ void ppc_interrupt(enum gpio_signal signal)
syv682x_interrupt(USBC_PORT_C0);
break;
case GPIO_USB_C1_PPC_INT_ODL:
- switch (ec_cfg_usb_db_type()) {
- case DB_USB_ABSENT:
- case DB_USB_ABSENT2:
- break;
- case DB_USB3_PS8815:
- nx20p348x_interrupt(USBC_PORT_C1);
- break;
- }
+ syv682x_interrupt(USBC_PORT_C1);
break;
case GPIO_USB_C2_PPC_INT_ODL:
syv682x_interrupt(USBC_PORT_C2);
@@ -432,10 +375,7 @@ __override bool board_is_dts_port(int port)
__override bool board_is_tbt_usb4_port(int port)
{
- if (port == USBC_PORT_C0 || port == USBC_PORT_C2)
- return true;
-
- return false;
+ return true;
}
__override enum tbt_compat_cable_speed board_get_max_tbt_speed(int port)