diff options
| author | Caveh Jalali <caveh@chromium.org> | 2021-05-20 21:36:45 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-05-22 01:29:45 +0000 |
| commit | 557b9dd40a8b4b85225ddaf45f34500f06bb4126 (patch) | |
| tree | a008ce5f9f472eaacc0277ed3aecc7681ee4d9fe /board/brya/gpio.inc | |
| parent | 4f31fabd6ecbe07ff9473dffa117fbff6bdc386d (diff) | |
| download | chrome-ec-557b9dd40a8b4b85225ddaf45f34500f06bb4126.tar.gz | |
brya: board ID 2: Move RT_RST to different pin
Brya board ID 2 moves the USB_C0_RT_RST_ODL pin from GPIO02 to GPIO07 of
the nct3808.
BRANCH=none
BUG=b:188826559
TEST=still able to read BB registers using EC console
Change-Id: I82875230ea7c2ecaedfbd4a1672031b81a4bd022
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2912056
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Commit-Queue: Boris Mittelberg <bmbm@google.com>
Diffstat (limited to 'board/brya/gpio.inc')
| -rw-r--r-- | board/brya/gpio.inc | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/board/brya/gpio.inc b/board/brya/gpio.inc index 3b78d0f7a0..b33e4cc70a 100644 --- a/board/brya/gpio.inc +++ b/board/brya/gpio.inc @@ -28,12 +28,12 @@ */ GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_OUT_LOW) -IOEX(USB_C0_RT_RST_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 2), GPIO_ODR_LOW) -IOEX(USB_C0_FRS_EN, EXPIN(IOEX_C0_NCT38XX, 0, 4), GPIO_LOW) -IOEX(USB_C0_OC_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 6), GPIO_ODR_HIGH) -IOEX(NCT_3808_GPIO07_P1, EXPIN(IOEX_C0_NCT38XX, 0, 7), GPIO_LOW) +IOEX(ID_1_USB_C0_RT_RST_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 2), GPIO_ODR_LOW) +IOEX(USB_C0_FRS_EN, EXPIN(IOEX_C0_NCT38XX, 0, 4), GPIO_LOW) +IOEX(USB_C0_OC_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 6), GPIO_ODR_HIGH) +IOEX(USB_C0_RT_RST_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 7), GPIO_ODR_LOW) -IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW) -IOEX(USB_C2_FRS_EN, EXPIN(IOEX_C2_NCT38XX, 0, 4), GPIO_LOW) -IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 6), GPIO_ODR_HIGH) -IOEX(USB_C2_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 7), GPIO_ODR_HIGH) +IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW) +IOEX(USB_C2_FRS_EN, EXPIN(IOEX_C2_NCT38XX, 0, 4), GPIO_LOW) +IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 6), GPIO_ODR_HIGH) +IOEX(USB_C2_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 7), GPIO_ODR_HIGH) |