summaryrefslogtreecommitdiff
path: root/board/brya
diff options
context:
space:
mode:
authorCaveh Jalali <caveh@chromium.org>2021-05-25 16:15:07 -0700
committerCommit Bot <commit-bot@chromium.org>2021-05-26 05:23:37 +0000
commit4f92b9c3b754735dfba03bc47d31539c3f73be76 (patch)
tree55dd3c3398ab8871c9cbe96ef0906174dd601e55 /board/brya
parent1254d6a26021f0741e7f091c8351f693a2be010b (diff)
downloadchrome-ec-4f92b9c3b754735dfba03bc47d31539c3f73be76.tar.gz
brya: Board ID 1: Set GPIO PCHHOT as input
This fixes the definition of the PCHHOT GPIO to be an input on the EC side. This signal can be used to monitor the PCH status. Updated the GPIO spreadsheet for board ID 1 and regenerated file. BRANCH=none BUG=b:184811017 TEST=boots on brya board ID 1 Change-Id: Idde5ef2e95c1690833532eb598c257a001499f4d Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2918476 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'board/brya')
-rw-r--r--board/brya/generated-gpio.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/brya/generated-gpio.inc b/board/brya/generated-gpio.inc
index db47db2cb3..ead239829d 100644
--- a/board/brya/generated-gpio.inc
+++ b/board/brya/generated-gpio.inc
@@ -58,7 +58,7 @@ GPIO(EC_I2C_USB_C1_MIX_SDA, PIN(E, 3), GPIO_INPUT)
GPIO(EC_I2C_USB_C1_TCPC_SCL, PIN(F, 3), GPIO_INPUT)
GPIO(EC_I2C_USB_C1_TCPC_SDA, PIN(F, 2), GPIO_INPUT)
GPIO(EC_KB_BL_EN, PIN(A, 3), GPIO_OUT_LOW)
-GPIO(EC_PCHHOT_ODL, PIN(7, 4), GPIO_ODR_HIGH)
+GPIO(EC_PCHHOT_ODL, PIN(7, 4), GPIO_INPUT)
GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH)
GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH)
GPIO(EC_PCH_RSMRST_L, PIN(A, 6), GPIO_OUT_LOW)