brya: Board ID 1: Handle TCPC_RST reassignment

We are transitioning GPIO definitions to be correct for board ID 2. In
order to support board ID 1 with the same EC image, some GPIOs need to
be reconfigured to their legacy settings at runtime when board ID 1 is
detected. For board ID 2, the TCPC C0/C2 reset GPIO has moved to a
previously unused pin. The original pin is now an ADC input pin.

BRANCH=none
BUG=b:183452273
TEST=verified TCPC C0/C2 can be reset on board ID 1 using
	ID_1_USB_C0_C2_TCPC_RST_ODL.

Change-Id: I52d8044ed10379346ae36d4f5d6cbe7446867182
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2914209
Reviewed-by: Boris Mittelberg <bmbm@google.com>

3 files changed, 43 insertions, 3 deletions

diff --git a/board/brya/board.c b/board/brya/board.c
index 4c3c89567e..93b75977e9 100644
--- a/board/brya/board.c
+++ b/board/brya/board.c
@@ -121,3 +121,26 @@ static void set_board_id_1_gpios(void)
 }
 DECLARE_HOOK(HOOK_INIT, set_board_id_1_gpios, HOOK_PRIO_FIRST);
 
+/*
+ * ALT function group MODULE_ADC are set in HOOK_PRIO_INIT_ADC.
+ * Reclaim these as GPIO as needed for board ID 1.
+ */
+
+static void id_1_reclaim_adc(void)
+{
+	if (get_board_id() != 1)
+		return;
+
+	/*
+	 * GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL is on GPIO34
+	 *
+	 * The TCPC has already been reset by board_tcpc_init() executed
+	 * from HOOK_PRIO_INIT_CHIPSET. Later, the pin gets set to ADC6
+	 * in HOOK_PRIO_INIT_ADC, so we simply need to set the pin back
+	 * to GPIO34.
+	 */
+	gpio_set_flags(GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL, GPIO_ODR_HIGH);
+	gpio_set_alternate_function(GPIO_PORT_3, BIT(4), GPIO_ALT_FUNC_NONE);
+}
+
+DECLARE_HOOK(HOOK_INIT, id_1_reclaim_adc, HOOK_PRIO_INIT_ADC + 1);
diff --git a/board/brya/gpio.inc b/board/brya/gpio.inc
index b33e4cc70a..e1619c1176 100644
--- a/board/brya/gpio.inc
+++ b/board/brya/gpio.inc
@@ -26,7 +26,17 @@
  * keyboard scan pins, so we do not list them in *gpio.inc. However, when
  * KEYBOARD_COL2_INVERTED is defined, this name is required.
  */
-GPIO(EC_KSO_02_INV,                  PIN(1, 7), GPIO_OUT_LOW)
+GPIO(EC_KSO_02_INV,               PIN(1, 7), GPIO_OUT_LOW)
+
+/*
+ * GPIO34 is an INPUT on board ID 2 and ODR_LOW on board ID 1.
+ *
+ * Since this pin is pulled up to 3.3V through a 30.9K ohm resistor on
+ * board ID 2, we will leak about 0.3mW until the pin is put in ALT mode
+ * when MODULE_ADC configuration runs. Initializing the pin to ODR_LOW
+ * gives us full control on both boards.
+ */
+GPIO(ID_1_USB_C0_C2_TCPC_RST_ODL, PIN(3, 4), GPIO_ODR_LOW)
 
 IOEX(ID_1_USB_C0_RT_RST_ODL, EXPIN(IOEX_C0_NCT38XX, 0, 2), GPIO_ODR_LOW)
 IOEX(USB_C0_FRS_EN,          EXPIN(IOEX_C0_NCT38XX, 0, 4), GPIO_LOW)
diff --git a/board/brya/usbc_config.c b/board/brya/usbc_config.c
index 177953796f..d4759b402e 100644
--- a/board/brya/usbc_config.c
+++ b/board/brya/usbc_config.c
@@ -228,11 +228,18 @@ __override void bb_retimer_power_handle(const struct usb_mux *me, int on_off)
 
 void board_reset_pd_mcu(void)
 {
+	enum gpio_signal tcpc_rst;
+
+	if (get_board_id() == 1)
+		tcpc_rst = GPIO_ID_1_USB_C0_C2_TCPC_RST_ODL;
+	else
+		tcpc_rst = GPIO_USB_C0_C2_TCPC_RST_ODL;
+
 	/*
 	 * TODO(b/179648104): figure out correct timing
 	 */
 
-	gpio_set_level(GPIO_USB_C0_C2_TCPC_RST_ODL, 0);
+	gpio_set_level(tcpc_rst, 0);
 	if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
 		gpio_set_level(GPIO_USB_C1_RST_ODL, 0);
 		gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0);
@@ -244,7 +251,7 @@ void board_reset_pd_mcu(void)
 
 	msleep(20);
 
-	gpio_set_level(GPIO_USB_C0_C2_TCPC_RST_ODL, 1);
+	gpio_set_level(tcpc_rst, 1);
 	if (ec_cfg_usb_db_type() != DB_USB_ABSENT) {
 		gpio_set_level(GPIO_USB_C1_RST_ODL, 1);
 		gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);