grunt: Board specific battery info

Split battery info between baseboard and board, following the
Octopus example. This will allow Grunt and Careena to define their
own lists of supported battery types.

This also adds CONFIG_BATTERY_REVIVE_DISCONNECT support, and
checks the charge/discharge FET status.

BUG=b:79704826,b:74018100
BRANCH=none
TEST=Grunt still boots ok.

Change-Id: I6e82ac5e48f9aabf59b63add253108513f0a6b60
Signed-off-by: Edward Hill <ecgh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1072039
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>

4 files changed, 72 insertions, 1 deletions

diff --git a/board/careena/battery.c b/board/careena/battery.c
new file mode 100644
index 0000000000..c0af812b9f
--- /dev/null
+++ b/board/careena/battery.c
@@ -0,0 +1,65 @@
+/* Copyright 2018 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Battery pack vendor provided charging profile
+ */
+
+#include "common.h"
+#include "baseboard_battery.h"
+#include "util.h"
+
+/*
+ * Battery info for all Careena battery types. Note that the fields
+ * start_charging_min/max and charging_min/max are not used for the charger.
+ * The effective temperature limits are given by discharging_min/max_c.
+ *
+ * Fuel Gauge (FG) parameters which are used for determining if the battery
+ * is connected, the appropriate ship mode (battery cutoff) command, and the
+ * charge/discharge FETs status.
+ *
+ * Ship mode (battery cutoff) requires 2 writes to the appropriate smart battery
+ * register. For some batteries, the charge/discharge FET bits are set when
+ * charging/discharging is active, in other types, these bits set mean that
+ * charging/discharging is disabled. Therefore, in addition to the mask for
+ * these bits, a disconnect value must be specified. Note that for TI fuel
+ * gauge, the charge/discharge FET status is found in Operation Status (0x54),
+ * but a read of Manufacturer Access (0x00) will return the lower 16 bits of
+ * Operation status which contains the FET status bits.
+ *
+ * The assumption for battery types supported is that the charge/discharge FET
+ * status can be read with a sb_read() command and therefore, only the register
+ * address, mask, and disconnect value need to be provided.
+ */
+const struct board_batt_params board_battery_info[] = {
+	/* Panasonic AP15O5L Battery Information */
+	[BATTERY_PANASONIC] = {
+		.fuel_gauge = {
+			.manuf_name = "PANASONIC",
+			.ship_mode = {
+				.reg_addr = 0x3A,
+				.reg_data = { 0xC574, 0xC574 },
+			},
+			.fet = {
+				.reg_addr = 0x0,
+				.reg_mask = 0x4000,
+				.disconnect_val = 0x0,
+			}
+		},
+		.batt_info = {
+			.voltage_max		= 13200,
+			.voltage_normal		= 11550, /* mV */
+			.voltage_min		= 9000, /* mV */
+			.precharge_current	= 256,	/* mA */
+			.start_charging_min_c	= 0,
+			.start_charging_max_c	= 50,
+			.charging_min_c		= 0,
+			.charging_max_c		= 60,
+			.discharging_min_c	= 0,
+			.discharging_max_c	= 60,
+		},
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT);
+
+const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_PANASONIC;
diff --git a/board/careena/board.h b/board/careena/board.h
index c76a3c9b72..22d34d3b5e 100644
--- a/board/careena/board.h
+++ b/board/careena/board.h
@@ -30,6 +30,11 @@ enum pwm_channel {
 	PWM_CH_COUNT
 };
 
+enum battery_type {
+	BATTERY_PANASONIC,
+	BATTERY_TYPE_COUNT,
+};
+
 #endif /* !__ASSEMBLER__ */
 
 #endif /* __CROS_EC_BOARD_H */
diff --git a/board/careena/build.mk b/board/careena/build.mk
index 9620af3152..c808e65aed 100644
--- a/board/careena/build.mk
+++ b/board/careena/build.mk
@@ -12,3 +12,4 @@ CHIP_VARIANT:=npcx7m6f
 BASEBOARD:=grunt
 
 board-y=board.o led.o
+board-$(CONFIG_BATTERY_SMART)+=battery.o
diff --git a/board/careena/gpio.inc b/board/careena/gpio.inc
index ed7dbb2d21..46428ae409 100644
--- a/board/careena/gpio.inc
+++ b/board/careena/gpio.inc
@@ -34,7 +34,7 @@ GPIO(PCH_WAKE_L,		PIN(7, 4), GPIO_OUT_HIGH)			/* Wake SOC */
 GPIO(PCH_RCIN_L,		PIN(3, 5), GPIO_ODR_HIGH)			/* Cold Reset to SOC */
 GPIO(CCD_MODE_ODL,		PIN(E, 3), GPIO_INPUT)				/* Case Closed Debug Mode */
 GPIO(ENTERING_RW,		PIN(E, 1), GPIO_OUT_LOW)			/* EC Entering RW */
-GPIO(EC_BATT_PRES_ODL,		PIN(E, 5), GPIO_INPUT | GPIO_PULL_UP)		/* Battery Present */
+GPIO(EC_BATT_PRES_L,		PIN(E, 5), GPIO_INPUT | GPIO_PULL_UP)		/* Battery Present */
 GPIO(PCH_SYS_PWROK,		PIN(D, 6), GPIO_OUT_LOW)			/* Power OK to SOC */
 GPIO(EC_APU_RST,		PIN(E, 4), GPIO_INPUT)				/* Reset to SOC */
 GPIO(CPU_PROCHOT,		PIN(3, 4), GPIO_INPUT | GPIO_SEL_1P8V)		/* PROCHOT to SOC */