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authorJenny TC <jenny.tc@intel.com>2017-05-24 18:12:32 +0530
committerchrome-bot <chrome-bot@chromium.org>2017-07-24 03:03:47 -0700
commit43081fded2ee9976dc16b1f5bd72bcade33c33d7 (patch)
tree9363e4d56e73d0745596cba97582c6797cf8985f /board/chell
parentd7f7f6931766472fab94726e82dc9b172f9c10a5 (diff)
downloadchrome-ec-43081fded2ee9976dc16b1f5bd72bcade33c33d7.tar.gz
S0ix: use both SLP_S0 interrupt and host command for s0ix
EC currently uses a host command from kernel to enter s0ix. This patch waits for the SLP_S0 interrupt to come after receiving the host command before entering S0ix. On the exit path, the SLP_S0 interrupt directly triggers the exit rather than waiting for the host command. BRANCH=none BUG=b:37443151 TEST=check in EC logs for SLP_S0 entry and powerindebug output, check suspend_stress_test on reef and soraka works fine, make -j8 buildall runs fine Change-Id: Ie5507b7a1e723532f07bc0671c2abd364f6224a2 Signed-off-by: Subramony Sesha <subramony.sesha@intel.com> Signed-off-by: Archana Patni <archana.patni@intel.com> Signed-off-by: Jenny TC <jenny.tc@intel.com> Reviewed-on: https://chromium-review.googlesource.com/513705 Commit-Ready: Jenny Tc <jenny.tc@intel.com> Tested-by: Jenny Tc <jenny.tc@intel.com> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'board/chell')
-rw-r--r--board/chell/board.c3
-rw-r--r--board/chell/board.h5
-rw-r--r--board/chell/gpio.inc5
3 files changed, 12 insertions, 1 deletions
diff --git a/board/chell/board.c b/board/chell/board.c
index 9d34ea058a..76edc55a69 100644
--- a/board/chell/board.c
+++ b/board/chell/board.c
@@ -81,6 +81,9 @@ void usb1_evt(enum gpio_signal signal)
/* power signal list. Must match order of enum power_signal. */
const struct power_signal_info power_signal_list[] = {
+#ifdef CONFIG_POWER_S0IX
+ {GPIO_PCH_SLP_S0_L, 1, "SLP_S0_DEASSERTED"},
+#endif
{GPIO_RSMRST_L_PGOOD, 1, "RSMRST_N_PWRGD"},
{GPIO_PCH_SLP_S3_L, 1, "SLP_S3_DEASSERTED"},
{GPIO_PCH_SLP_S4_L, 1, "SLP_S4_DEASSERTED"},
diff --git a/board/chell/board.h b/board/chell/board.h
index 4a85b08e28..9b1cfd8620 100644
--- a/board/chell/board.h
+++ b/board/chell/board.h
@@ -173,7 +173,10 @@ enum pwm_channel {
/* power signal definitions */
enum power_signal {
- X86_RSMRST_L_PWRGD = 0,
+#ifdef CONFIG_POWER_S0IX
+ X86_SLP_S0_DEASSERTED,
+#endif
+ X86_RSMRST_L_PWRGD,
X86_SLP_S3_DEASSERTED,
X86_SLP_S4_DEASSERTED,
X86_SLP_SUS_DEASSERTED,
diff --git a/board/chell/gpio.inc b/board/chell/gpio.inc
index d8da255b09..4529d8df7c 100644
--- a/board/chell/gpio.inc
+++ b/board/chell/gpio.inc
@@ -13,6 +13,9 @@ GPIO_INT(AC_PRESENT, PIN(30), GPIO_INT_BOTH, extpower_interrupt)
GPIO_INT(WP_L, PIN(33), GPIO_INT_BOTH, switch_interrupt)
/* Buffered power button input from PMIC / ROP_EC_PWR_BTN_L_R */
GPIO_INT(POWER_BUTTON_L, PIN(35), GPIO_INT_BOTH, power_button_interrupt)
+#ifdef CONFIG_POWER_S0IX
+GPIO_INT(PCH_SLP_S0_L, PIN(211), GPIO_INT_BOTH, power_signal_interrupt)
+#endif
/* RSMRST from PMIC */
GPIO_INT(RSMRST_L_PGOOD, PIN(63), GPIO_INT_BOTH, power_signal_interrupt)
GPIO_INT(PCH_SLP_S4_L, PIN(200), GPIO_INT_BOTH, power_signal_interrupt)
@@ -55,7 +58,9 @@ GPIO(PCH_RSMRST_L, PIN(143), GPIO_OUT_LOW)
GPIO(PCH_RTCRST, PIN(163), GPIO_OUT_LOW)
GPIO(SYS_RESET_L, PIN(121), GPIO_ODR_HIGH)
GPIO(ENTERING_RW, PIN(41), GPIO_OUT_LOW)
+#ifndef CONFIG_POWER_S0IX
GPIO(PCH_SLP_S0_L, PIN(211), GPIO_INPUT)
+#endif
/* Devices and power */
GPIO(PP1800_DX_DMIC_EN, PIN(11), GPIO_OUT_LOW)