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author | Shawn Nematbakhsh <shawnn@google.com> | 2015-11-16 10:19:27 -0800 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2015-11-17 14:40:07 -0800 |
commit | 74aad9a0a4bcbfa621a9475aa886e8c137f20fd4 (patch) | |
tree | 32152b97f2b3032a8bcdd00c2e5e8882ae099308 /board/chell | |
parent | dbebdfdb70c4b50dd61dec036c7b2ec86ec8993d (diff) | |
download | chrome-ec-74aad9a0a4bcbfa621a9475aa886e8c137f20fd4.tar.gz |
chell: Increase RO/RW image size to 104KB
With recent optimizations, we have more SRAM available for code.
BUG=None
TEST=`make BOARD=chell -j`
BRANCH=None
Change-Id: Id2e9c605132994ccab2c51f8f27cfe66e7dd3553
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/312791
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Diffstat (limited to 'board/chell')
-rw-r--r-- | board/chell/board.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/chell/board.h b/board/chell/board.h index efff4de1b7..298e3bab03 100644 --- a/board/chell/board.h +++ b/board/chell/board.h @@ -48,7 +48,7 @@ #define CONFIG_PWM_KBLIGHT /* All data won't fit in data RAM. So, moving boundary slightly. */ #undef CONFIG_RO_SIZE -#define CONFIG_RO_SIZE (100 * 1024) +#define CONFIG_RO_SIZE (104 * 1024) #define CONFIG_SCI_GPIO GPIO_PCH_SCI_L /* We're space constrained on Chell, so reduce the UART TX buffer size. */ #undef CONFIG_UART_TX_BUF_SIZE |