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authorRyan Zhang <ryan.zhang@quanta.corp-partner.google.com>2018-04-20 10:58:18 +0800
committerchrome-bot <chrome-bot@chromium.org>2018-06-07 16:52:26 -0700
commit108ea1ea3314f69469e1ea71f0f44754fb96b8df (patch)
tree8323e66eb7bc6ee4c6badb5bd99159463af27fe4 /board/chell
parenta8f4ad9f26a35a786e17498fa4d0a513b9412856 (diff)
downloadchrome-ec-108ea1ea3314f69469e1ea71f0f44754fb96b8df.tar.gz
Fizz: add CONFIG_BOARD_HAS_RTC_RESET
This patch resets the RTC of the SoC when the system doesn't leave S5. If it fails 5 times, the system will go back to and stay in G3. BUG=b:79323716 BRANCH=fizz TEST=Boot Fizz differently: 1. AC plug-in 2. Power button press 3. reboot EC command 4. servo reset button 5. Recovery mode Change-Id: I728c99c342fb888600599acbe25f72a478ccf948 Signed-off-by: Ryan Zhang <ryan.zhang@quanta.corp-partner.google.com> Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1020583 Reviewed-on: https://chromium-review.googlesource.com/1089035 Reviewed-by: Duncan Laurie <dlaurie@google.com>
Diffstat (limited to 'board/chell')
-rw-r--r--board/chell/board.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/board/chell/board.h b/board/chell/board.h
index ae5c4dc17f..f9a75bf4c5 100644
--- a/board/chell/board.h
+++ b/board/chell/board.h
@@ -223,9 +223,6 @@ extern const int keyboard_factory_scan_pins_used;
/* Reset PD MCU */
void board_reset_pd_mcu(void);
-/* Reset RTC */
-void board_rtc_reset(void);
-
#endif /* !__ASSEMBLER__ */
#endif /* __CROS_EC_BOARD_H */