diff options
author | Wai-Hong Tam <waihong@google.com> | 2018-09-19 15:10:57 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2018-10-30 01:04:51 -0700 |
commit | b47ed2a108c679de26be89fa258931ddf040e446 (patch) | |
tree | a170884ea21d2a7c21f0a72ed06d299a11ed857b /board/cheza | |
parent | 5f068e277ba6de108615aa3190ccb14b316b67f0 (diff) | |
download | chrome-ec-b47ed2a108c679de26be89fa258931ddf040e446.tar.gz |
cheza: Monitor the WARM_RESET_L signal to hold AP
This change is a backup solution if JTAG_SRST gets fused out.
The WARM_RESET_L signal is wired to JTAG_SRST, such that we can
hold AP when servo/H1 programs the AP SPI flash. But when JTAG_SRST
gets fused out (just in case it happens), still have a way to hold
AP, i.e. overdriving the AP_RST_L and PS_HOLD signals.
The WARM_RESET_L signal is pulled by a rail from PMIC, the same as
POWER_GOOD. The drop of WARM_RESET_L may be caused by either servo/
cr50 holds the signal or its pull-up rail drops. We should handle
both cases.
Also add WARM_RESET_L as one of the power signals for debug purpose.
BRANCH=none
BUG=b:78194018, b:112723105, b:112564635
TEST=Ran "dut-control warm_reset:on" and "dut-control warm_reset:off".
Scoped the signal of AP_RST_L and PS_HOLD to verify the correctness.
Verified AP hold and back booting up.
TEST=Changed to the gpio.inc to swap LID_OPEN and WARM_RESET_L and
ran "dut-control lid_open:no" and "dut-control lid_open:yes" to emualte
the case JTAG_SRST gets fused out. Scoped the signal correctness.
Verified AP hold and back booting up. Ran flashrom to program AP SPI
flash through servo.
Change-Id: I71ebd920171da9994192f7742675feb7cb39ce2f
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/1234743
Diffstat (limited to 'board/cheza')
-rw-r--r-- | board/cheza/board.c | 4 | ||||
-rw-r--r-- | board/cheza/board.h | 1 | ||||
-rw-r--r-- | board/cheza/gpio.inc | 12 |
3 files changed, 13 insertions, 4 deletions
diff --git a/board/cheza/board.c b/board/cheza/board.c index e1d85f91f2..4bf71eab01 100644 --- a/board/cheza/board.c +++ b/board/cheza/board.c @@ -204,6 +204,10 @@ const struct power_signal_info power_signal_list[] = { GPIO_POWER_GOOD, POWER_SIGNAL_ACTIVE_HIGH, "POWER_GOOD"}, + [SDM845_WARM_RESET] = { + GPIO_WARM_RESET_L, + POWER_SIGNAL_ACTIVE_HIGH, + "WARM_RESET_L"}, }; BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); diff --git a/board/cheza/board.h b/board/cheza/board.h index ce83a439b6..9998233356 100644 --- a/board/cheza/board.h +++ b/board/cheza/board.h @@ -172,6 +172,7 @@ enum power_signal { SDM845_PS_HOLD, SDM845_PMIC_FAULT_L, SDM845_POWER_GOOD, + SDM845_WARM_RESET, /* Number of power signals */ POWER_SIGNAL_COUNT }; diff --git a/board/cheza/gpio.inc b/board/cheza/gpio.inc index 49dbfdc008..3ba7840340 100644 --- a/board/cheza/gpio.inc +++ b/board/cheza/gpio.inc @@ -27,12 +27,17 @@ GPIO_INT(VOLUME_UP_L, PIN(F, 2), GPIO_INT_BOTH | GPIO_PULL_UP, button_inte GPIO_INT(WP_L, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) /* EC_WP_ODL */ GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) /* LID_OPEN_EC */ GPIO_INT(AP_RST_REQ, PIN(C, 2), GPIO_INT_RISING | GPIO_PULL_DOWN | GPIO_SEL_1P8V, chipset_reset_request_interrupt) /* Reset request from AP */ -/* AP_RST_L and PS_HOLD are used for PMIC and AP negotiation. Don't change their states. */ GPIO_INT(AP_RST_L, PIN(C, 1), GPIO_INT_BOTH | GPIO_SEL_1P8V, power_signal_interrupt) GPIO_INT(PS_HOLD, PIN(D, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) /* Indicate when AP triggers reset/shutdown */ GPIO_INT(PMIC_FAULT_L, PIN(7, 6), GPIO_INT_BOTH | GPIO_SEL_1P8V, power_signal_interrupt) /* Any PMIC fault? */ -/* When switch-cap is off, the POWER_GOOD signal is floating. Need a pull-down to make it low. */ -GPIO_INT(POWER_GOOD, PIN(5, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) /* SRC_PP1800_S4A from PMIC */ +/* + * When switch-cap is off, the POWER_GOOD signal is floating. Need a pull-down + * to make it low. Overload the interrupt function chipset_warm_reset_interrupt + * for not only signalling power_signal_interrupt but also handling the logic + * of WARM_RESET_L which is pulled-up by the same rail of POWER_GOOD. + */ +GPIO_INT(POWER_GOOD, PIN(5, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, chipset_warm_reset_interrupt) /* SRC_PP1800_S4A from PMIC */ +GPIO_INT(WARM_RESET_L, PIN(F, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, chipset_warm_reset_interrupt) /* AP warm reset */ GPIO_INT(SHI_CS_L, PIN(5, 3), GPIO_INT_FALLING | GPIO_PULL_DOWN | GPIO_SEL_1P8V, shi_cs_event) /* AP_EC_SPI_CS_L */ GPIO_INT(CC_LID_BASE_ADC, PIN(4, 5), GPIO_INT_BOTH, base_detect_interrupt) /* Base detection */ @@ -54,7 +59,6 @@ GPIO(PROCHOT_L, PIN(3, 4), GPIO_INPUT) /* PMIC/AP 1.8V */ GPIO(PM845_RESIN_L, PIN(3, 2), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* PMIC reset trigger */ -GPIO(WARM_RESET_L, PIN(F, 4), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* AP warm reset */ GPIO(PMIC_KPD_PWR_ODL, PIN(D, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* PMIC power button */ GPIO(EC_INT_L, PIN(A, 2), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* Interrupt line between AP and EC */ GPIO(AP_SUSPEND_L, PIN(5, 7), GPIO_INPUT | GPIO_SEL_1P8V) /* Suspend signal from AP */ |