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| author | Sam Hurst <shurst@google.com> | 2018-09-13 09:27:08 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-04-08 22:30:19 -0700 |
| commit | 0fe6147a9d8d9feef5049aa6c6c4a6ad30d12b26 (patch) | |
| tree | 05d4509bcfe68a248ec3fa58168f3de2536c2d9c /board/chocodile_vpdmcu/board.c | |
| parent | e097feb8b2db20cd2435a483517356defa222db1 (diff) | |
| download | chrome-ec-0fe6147a9d8d9feef5049aa6c6c4a6ad30d12b26.tar.gz | |
chocodile_vpdmcu: Firmware for chocodile mcu
Implement Chocodile Charge-Through Vconn Powered firmware for mcu
using new Type-C/PD State machine stack.
BUG=b:115626873
BRANCH=none
TEST=manual
Charge-Through was tested on an Atlas running a DRP USB-C/PD state
machine with CTUnattached.SNK and CTAttached.SNK states.
Signed-off-by: Sam Hurst <shurst@chromium.org>
Change-Id: I847f1bcd2fc3ce41e66edd133a10c943d5e8c819
Reviewed-on: https://chromium-review.googlesource.com/1225250
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Diffstat (limited to 'board/chocodile_vpdmcu/board.c')
| -rw-r--r-- | board/chocodile_vpdmcu/board.c | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/board/chocodile_vpdmcu/board.c b/board/chocodile_vpdmcu/board.c new file mode 100644 index 0000000000..ea4d129502 --- /dev/null +++ b/board/chocodile_vpdmcu/board.c @@ -0,0 +1,70 @@ +/* Copyright 2019 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* chocodile board configuration */ + +#include "adc.h" +#include "adc_chip.h" +#include "common.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "i2c.h" +#include "registers.h" +#include "switch.h" +#include "system.h" +#include "task.h" +#include "usb_pd.h" +#include "usb_pd_tcpc.h" +#include "util.h" +#include "vpd_api.h" + +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) + +void board_config_pre_init(void) +{ + /* enable SYSCFG clock */ + STM32_RCC_APB2ENR |= 1 << 0; +} + +#include "gpio_list.h" + +/* Initialize board. */ +static void board_init(void) +{ + /* Do nothing */ +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); + +/* ADC channels */ +const struct adc_t adc_channels[] = { + /* USB PD CC lines sensing. Converted to mV (3300mV/4096). */ + [ADC_VCONN_VSENSE] = { + "VCONN_VSENSE", 3000, 4096, 0, STM32_AIN(ADC_VCONN_VSENSE)}, + [ADC_CC_VPDMCU] = { + "CC_VPDMCU", 3000, 4096, 0, STM32_AIN(ADC_CC_VPDMCU)}, + [ADC_CC_RP3A0_RD_L] = { + "CC_RP3A0_RD_L", 3000, 4096, 0, STM32_AIN(ADC_CC_RP3A0_RD_L)}, + [ADC_RDCONNECT_REF] = { + "RDCONNECT_REF", 3000, 4096, 0, STM32_AIN(ADC_RDCONNECT_REF)}, + [ADC_CC1_RP3A0_RD_L] = { + "CC1_RP1A5_ODH", 3000, 4096, 0, STM32_AIN(ADC_CC1_RP3A0_RD_L)}, + [ADC_CC2_RP3A0_RD_L] = { + "CC2_RP1A5_ODH", 3000, 4096, 0, STM32_AIN(ADC_CC2_RP3A0_RD_L)}, + [ADC_HOST_VBUS_VSENSE] = { + "HOST_VBUS_VSENSE", 3000, 4096, 0, STM32_AIN(ADC_HOST_VBUS_VSENSE)}, + [ADC_CHARGE_VBUS_VSENSE] = { + "CHARGE_VBUS_VSENSE", 3000, 4096, 0, STM32_AIN(ADC_CHARGE_VBUS_VSENSE)}, + [ADC_CC1_RPUSB_ODH] = { + "CC1_RPUSB_ODH", 3000, 4096, 0, STM32_AIN(ADC_CC1_RPUSB_ODH)}, + [ADC_CC2_RPUSB_ODH] = { + "CC2_RPUSB_ODH", 3000, 4096, 0, STM32_AIN(ADC_CC2_RPUSB_ODH)}, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +void tcpc_alert_clear(int port) +{ + /* Do nothing */ +} |