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| author | Simon Zhou <zhouguohui@huaqin.corp-partner.google.com> | 2020-11-10 21:48:16 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-08 19:25:40 +0000 |
| commit | ee2518c3d5d793933f4cc44ed66595186e04e795 (patch) | |
| tree | dc8dd1a7c433366f67489eb3f1529f11efbb1f3d /board/coachz | |
| parent | d5ed045a43c3b5e0c535c40adbd25b1fd44ba087 (diff) | |
| download | chrome-ec-ee2518c3d5d793933f4cc44ed66595186e04e795.tar.gz | |
Coachz: remove base_DET ALT setting
The base_DET pin interrupt requires setting to gpio
Remove ALT setting to enable interrupt
BRANCH=trogdor
BUG=b:175747582
TEST=make BOARD=coach
check the softkeyboard hot-plug function is ok
Change-Id: I09cf857fc32cf855ef75ce2ad4448a4b65508156
Signed-off-by: Simon Zhou <zhouguohui@huaqin.corp-partner.google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2529271
Reviewed-by: Gang He <hegang5@huaqin.corp-partner.google.com>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
Reviewed-by: Bob Moragues <moragues@chromium.org>
Tested-by: Gang He <hegang5@huaqin.corp-partner.google.com>
Commit-Queue: Wai-Hong Tam <waihong@google.com>
Diffstat (limited to 'board/coachz')
| -rw-r--r-- | board/coachz/gpio.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/board/coachz/gpio.inc b/board/coachz/gpio.inc index 7e9c4c57e5..045060c3d8 100644 --- a/board/coachz/gpio.inc +++ b/board/coachz/gpio.inc @@ -194,7 +194,6 @@ ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* I2C1 SCL (GPIO87) ALTERNATE(PIN_MASK(3, 0x48), 1, MODULE_I2C, 0) /* I2C5 (GPIO33/36) */ ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, GPIO_SEL_1P8V) /* I2C7 (GPIOB2/B3) - 1.8V */ ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* I2C3 (GPIOD0/D1) */ -ALTERNATE(PIN_MASK(3, 0x80), 0, MODULE_ADC, 0) /* ADC5 (GPIO37) */ ALTERNATE(PIN_MASK(4, 0x1C), 0, MODULE_ADC, 0) /* ADC1 (GPIO44), ADC2 (GPIO43), ADC3 (GPIO42) */ ALTERNATE(PIN_MASK(4, 0xC0), 1, MODULE_SPI, GPIO_SEL_1P8V) /* SHI_SDO (GPIO47), SHI_SDI (GPIO46) */ ALTERNATE(PIN_MASK(5, 0x28), 1, MODULE_SPI, GPIO_SEL_1P8V) /* SHI_SCLK (GPIO55), SHI_CS# (GPIO53) */ |