diff options
| author | Rong Chang <rongchang@chromium.org> | 2017-09-04 14:01:59 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-11-29 04:04:12 -0800 |
| commit | cf0153224ebe3acd6264fb15c514184b282e78bb (patch) | |
| tree | e221d37d46429cd9721cf84deadbe8eae3198b82 /board/coffeecake/gpio.inc | |
| parent | 216bb5f9d7fdeac65e3ed572b463ca13982b7e83 (diff) | |
| download | chrome-ec-cf0153224ebe3acd6264fb15c514184b282e78bb.tar.gz | |
coffeecake: initial commit
Clone HoHo board to CoffeeCake.
BRANCH=none
BUG=none
TEST=make BOARD=coffeecake -j
Signed-off-by: Rong Chang <rongchang@chromium.org>
Change-Id: I62b4bf92a2eaffbc145197c7f36cfb7a29722bf5
Reviewed-on: https://chromium-review.googlesource.com/673963
Reviewed-by: Benson Leung <bleung@chromium.org>
Diffstat (limited to 'board/coffeecake/gpio.inc')
| -rw-r--r-- | board/coffeecake/gpio.inc | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/board/coffeecake/gpio.inc b/board/coffeecake/gpio.inc new file mode 100644 index 0000000000..cfb689d825 --- /dev/null +++ b/board/coffeecake/gpio.inc @@ -0,0 +1,37 @@ +/* -*- mode:c -*- + * + * Copyright 2017 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +GPIO_INT(DP_HPD, PIN(A, 0), GPIO_INT_BOTH, hpd_event) + +GPIO(USB_C_CC1_PD, PIN(A, 1), GPIO_ANALOG) +GPIO(STM_READY, PIN(A, 2), GPIO_OUT_LOW) /* factory test only */ +GPIO(MCDP_RESET_L, PIN(A, 3), GPIO_OUT_HIGH) +GPIO(PD_DAC_REF, PIN(A, 4), GPIO_ANALOG) + +GPIO(MCDP_READY, PIN(A, 7), GPIO_OUT_LOW) /* factory test only */ +GPIO(PD_SBU_ENABLE, PIN(A, 8), GPIO_OUT_LOW) +GPIO(USB_DM, PIN(A, 11), GPIO_ANALOG) +GPIO(USB_DP, PIN(A, 12), GPIO_ANALOG) +GPIO(PD_CC1_TX_EN, PIN(A, 15), GPIO_OUT_LOW) + +GPIO(MCDP_GPIO1, PIN(B, 0), GPIO_INPUT) +GPIO(MCDP_CONFIG1, PIN(B, 1), GPIO_INPUT) +GPIO(PD_MCDP_SPI_WP_L, PIN(B, 2), GPIO_OUT_LOW) +GPIO(PD_CC1_TX_DATA, PIN(B, 4), GPIO_OUT_LOW) +GPIO(PD_MCDP_SPI_CS_L, PIN(B, 12), GPIO_INPUT) + +/* Unimplemented signals which we need to emulate for now */ +UNIMPLEMENTED(ENTERING_RW) +UNIMPLEMENTED(WP_L) + +ALTERNATE(PIN_MASK(B, 0x0008), 0, MODULE_USB_PD, 0) /* SPI1: SCK(PB3) */ +ALTERNATE(PIN_MASK(B, 0x0200), 2, MODULE_USB_PD, 0) /* TIM17_CH1: PB9 */ +ALTERNATE(PIN_MASK(A, 0x0600), 1, MODULE_UART, GPIO_PULL_UP) /* USART1: PA9/PA10 */ +ALTERNATE(PIN_MASK(B, 0x0C00), 4, MODULE_UART, GPIO_PULL_UP) /* USART3: PB10/PB11 */ |