SN5S330: treat interrupts as level-sensitive

The SN5S330 PPC will pull its /INT pin low until all interrupts are
cleared.  Since the interrupt pin is treated as edge-sensitive, its
handler needs to provide level-checking before exiting.  Otherwise, if
not all interrupts are cleared before the handler exits, the EC won't
see another edge to call the handler again.

Boards which share the PPC interrupt pin with other sources may choose
to implement their own callback, if they are able to determine which
chip was the source of the interrupt.

BUG=b:118846062
BRANCH=None
TEST=performed several power swaps and unplugs on a pair of Careenas,
verifying that in instances where the handler had to loop around we
correctly cleared the interrupts and the "ectool usbpdpower" output was
normal

Change-Id: Iccbe40976a746d109d67b9a91f8fbd81898f9b3f
Signed-off-by: Diana Z <dzigterman@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1327123
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Edward Hill <ecgh@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>

0 files changed, 0 insertions, 0 deletions