diff options
author | Jenny TC <jenny.tc@intel.com> | 2017-05-24 18:12:32 +0530 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2017-07-24 03:03:47 -0700 |
commit | 43081fded2ee9976dc16b1f5bd72bcade33c33d7 (patch) | |
tree | 9363e4d56e73d0745596cba97582c6797cf8985f /board/coral/board.h | |
parent | d7f7f6931766472fab94726e82dc9b172f9c10a5 (diff) | |
download | chrome-ec-43081fded2ee9976dc16b1f5bd72bcade33c33d7.tar.gz |
S0ix: use both SLP_S0 interrupt and host command for s0ix
EC currently uses a host command from kernel to enter s0ix.
This patch waits for the SLP_S0 interrupt to come after receiving
the host command before entering S0ix.
On the exit path, the SLP_S0 interrupt directly triggers the
exit rather than waiting for the host command.
BRANCH=none
BUG=b:37443151
TEST=check in EC logs for SLP_S0 entry and powerindebug output,
check suspend_stress_test on reef and soraka works fine,
make -j8 buildall runs fine
Change-Id: Ie5507b7a1e723532f07bc0671c2abd364f6224a2
Signed-off-by: Subramony Sesha <subramony.sesha@intel.com>
Signed-off-by: Archana Patni <archana.patni@intel.com>
Signed-off-by: Jenny TC <jenny.tc@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/513705
Commit-Ready: Jenny Tc <jenny.tc@intel.com>
Tested-by: Jenny Tc <jenny.tc@intel.com>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'board/coral/board.h')
-rw-r--r-- | board/coral/board.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/board/coral/board.h b/board/coral/board.h index 1e60507c12..db6ccf0ace 100644 --- a/board/coral/board.h +++ b/board/coral/board.h @@ -235,7 +235,10 @@ enum pwm_channel { }; enum power_signal { - X86_RSMRST_N = 0, +#ifdef CONFIG_POWER_S0IX + X86_SLP_S0_N, +#endif + X86_RSMRST_N, X86_SLP_S3_N, X86_SLP_S4_N, X86_SUSPWRDNACK, |