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author | Aseda Aboagye <aaboagye@google.com> | 2017-02-07 18:52:13 -0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2017-02-09 22:50:50 -0800 |
commit | b889e47410698986822712078ec232c1715b4845 (patch) | |
tree | 8d3ec71d39f90e60fb3f2ba00fc0d1e2f9350ad0 /board/cr50/board.c | |
parent | 4ce529e25acd4683f7232dc627c72cb7f3f84d77 (diff) | |
download | chrome-ec-b889e47410698986822712078ec232c1715b4845.tar.gz |
cr50: Use BATT_PRES_L as source of write protect.
This commit changes the Cr50 write protect behaviour to simply follow
the state of the battery present pin. The state can still be overridden
both ways by using the `wp` console command. A user can either force
write protect enabled or force write protect disabled. Additionally,
the behaviour can be reset to follow the state of the battery pin by
issuing `wp follow_batt_pres`. However, the ability to force the write
protect state requires an unlocked console.
BUG=chrome-os-partner:62726
BRANCH=None
TEST=Plug in battery, verify that WP is enabled. Plug in AC and unplug
battery, verify that WP is disabled.
TEST=Unplug battery, unplug AC, plug in AC, verify that WP is disabled.
TEST=Unplug battery, verify that WP is disabled. Use `wp' command to
enable WP, verify that it is enabled.
TEST=Plug in battery, disable WP using `wp` command, put cr50 into deep
sleep, wake it up, verify that WP is still disabled.
TEST=Plug in AC, plug in battery, disable WP using `wp` command, unplug
and plug battery connector, verify that WP is still disabled.
Change-Id: I83d9820067800801ddbde311eab0853c3c2216d3
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/439485
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Diffstat (limited to 'board/cr50/board.c')
-rw-r--r-- | board/cr50/board.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c index ece5b27875..074bfd7c17 100644 --- a/board/cr50/board.c +++ b/board/cr50/board.c @@ -35,6 +35,7 @@ #include "usb_spi.h" #include "usb_i2c.h" #include "util.h" +#include "wp.h" /* Define interrupt and gpio structs */ #include "gpio_list.h" @@ -773,6 +774,11 @@ struct device_config device_states[] = { .detect = GPIO_DETECT_EC, .name = "EC" }, + [DEVICE_BATTERY_PRESENT] = { + .deferred = NULL, + .detect = GPIO_BATT_PRES_L, + .name = "BattPrsnt" + }, }; BUILD_ASSERT(ARRAY_SIZE(device_states) == DEVICE_COUNT); @@ -816,6 +822,32 @@ void device_state_on(enum gpio_signal signal) void board_update_device_state(enum device_type device) { + if (device == DEVICE_BATTERY_PRESENT) { + /* The battery presence pin is active low. */ + int bp = !gpio_get_level(device_states[device].detect); + + /* + * We use BATT_PRES_L as the source for write protect. However, + * since it can be overridden by a console command, only change + * the write protect state when the battery presence pin has + * changed and we're not forcing it. + */ + if (device_set_state(device, + bp ? + DEVICE_STATE_ON : DEVICE_STATE_OFF)) { + CPRINTS("battery %spresent", bp ? "" : "NOT "); + + /* + * Only update the write protect state if we're not + * forcing it. + */ + if ((GREG32(PMU, LONG_LIFE_SCRATCH1) & BOARD_FORCING_WP) + == 0) + set_wp_state(bp); + } + return; + } + if (device == DEVICE_SERVO && servo_state_unknown()) return; |