diff options
| author | Namyoon Woo <namyoon@chromium.org> | 2019-12-27 10:32:23 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-02-08 04:08:18 +0000 |
| commit | 1411a256089ad45a99a2e327972bc6f732f5a6e9 (patch) | |
| tree | 4049582527aade9d95ac4012b2d06a6a5d5f2f7f /board/cr50/gpio.inc | |
| parent | 341cc2da402e23dc9ff09072058f79d5ec0c40c6 (diff) | |
| download | chrome-ec-1411a256089ad45a99a2e327972bc6f732f5a6e9.tar.gz | |
make DIOB3 interruptible and wakable for EC-EFS2
If the board supports EC-CR50 communication, Cr50 enables both
rising/falling-edge triggered interrupt on DIOB3 pin and makes
it wakable as well.Cr50 connects GPIO_AP_FLASH_SELECT to DIOB4.
If the board does not support EC-CR50 communication, Cr50 connects
GPIO_AP_FLASH_SELECT to DIOB3.
If EC puts high on DIOB3 to activate EC-CR50 communication, CR50
enables UART_EC RX and TX.
BUG=chromium:1035706
BRANCH=cr50
TEST=none
Change-Id: I1221a1a19219274622ab710568ce7c66ab2f1da7
Signed-off-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1989581
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Diffstat (limited to 'board/cr50/gpio.inc')
| -rw-r--r-- | board/cr50/gpio.inc | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc index 2f2402aea3..9457adba99 100644 --- a/board/cr50/gpio.inc +++ b/board/cr50/gpio.inc @@ -69,6 +69,8 @@ * GPIO1.4 detect_tpm_rst_asserted * GPIO1.5 unwedge_i2cs_scl * GPIO1.6 monitor_i2cs_sda + * GPIO1.7 ec_packet_mode_en + * GPIO1.8 ec_packet_mode_dis * GPIO1.10 rec_lid_switch * GPIO1.11 ec_tx_cr50_rx_in * GPIO1.12 strap_a0 @@ -106,6 +108,15 @@ GPIO_INT(DETECT_SERVO, PIN(1, 3), GPIO_INT_HIGH | GPIO_PULL_DOWN, GPIO_INT(DETECT_TPM_RST_L_ASSERTED, PIN(1, 4), GPIO_INT_FALLING, tpm_rst_asserted) +/* + * These GPIOs are to enable or disable EC-CR50 communication. + * NOTE: If these are changed, you must update the information in board.c + * and ec_comm.c + */ +GPIO_INT(EC_PACKET_MODE_EN, PIN(1, 7), GPIO_INT_RISING, ec_comm_packet_mode_en) +GPIO_INT(EC_PACKET_MODE_DIS, PIN(1, 8), GPIO_INT_FALLING, + ec_comm_packet_mode_dis) + /*****************************************************************************/ /* NON STANDARD INTERRUPT GPIOs - handlers defined and configured in board.c */ /* |