diff options
| author | Vadim Bendebury <vbendeb@google.com> | 2016-09-13 16:42:12 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-09-15 13:42:16 -0700 |
| commit | d50b7699b57b47b6ac3414d6c5b747ca9e1dd0e9 (patch) | |
| tree | 43449f428339c75634cb170ffbcf3160d8bf283c /board/cr50/gpio.inc | |
| parent | 76f2f81a9297b99215d9f499fe8f0e593fd2eda7 (diff) | |
| download | chrome-ec-d50b7699b57b47b6ac3414d6c5b747ca9e1dd0e9.tar.gz | |
g: generate AP_INT_L pulse after i2cs processing finished
The g i2c slave controller does not support clock stretching, so it is
necessary to flow control the AP by some other means. Luckily there is
an interrupt line which g can toggle and the AP can watch.
This patch adds generating a pulse on the AP interrupt line once g
finished processing the i2c transaction. In case of the read
transaction the pulse is generated after the data to read is put in
the i2cs transmit buffer.
BRANCH=none
BUG=chrome-os-partner:57338
TEST=with this patch and the AP firmware synchronizing on the
interrupt pulse, the TPM initialization succeeds in coreboot and
depthcharge.
Change-Id: I16c09b59b7d772624baa9d1f5258aaff26f91ff9
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/385256
Reviewed-by: Scott Collyer <scollyer@chromium.org>
Diffstat (limited to 'board/cr50/gpio.inc')
| -rw-r--r-- | board/cr50/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc index b577a9b924..3c40599034 100644 --- a/board/cr50/gpio.inc +++ b/board/cr50/gpio.inc @@ -23,7 +23,7 @@ GPIO_INT(SERVO_UART2_OFF, PIN(1, 6), GPIO_INT_FALLING | GPIO_PULL_DOWN, device_state_off) /* Pull this low to interrupt the AP */ -GPIO(INT_AP_L, PIN(0, 0), GPIO_INPUT) +GPIO(INT_AP_L, PIN(0, 0), GPIO_OUT_HIGH) /* Use these to take over the AP & EC flash (only when AP & EC are off!) */ GPIO(EC_FLASH_SELECT, PIN(0, 1), GPIO_OUT_LOW) |