diff options
author | Scott <scollyer@chromium.org> | 2016-08-02 12:36:52 -0700 |
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committer | chrome-bot <chrome-bot@chromium.org> | 2016-09-05 23:22:13 -0700 |
commit | e4f389a275fb81c112b1186df0465e48ff163cfd (patch) | |
tree | 8cb4b98a9a79a8f89461f5472c7f8e947e373e9c /board/cr50/gpio.inc | |
parent | d6c69cef59b9abb31da6ed362b61340a5d8318b9 (diff) | |
download | chrome-ec-e4f389a275fb81c112b1186df0465e48ff163cfd.tar.gz |
Cr50: Preliminary I2CS TPM2.0 driver
This CL includes changes in Cr50 required to support TPM via
the I2CS interface.
BRANCH=none
BUG=chrome-os-partner:40397
TEST=manual
Limited testing so far. Verified that the I2CS interface is
initialized properly and that register reads occur when
initiated on the AP console via command i2cget -y 8 0x50 0x1 w
Change-Id: I16ac17c7c82d420a384908e4b5a9867a3b24bc9e
Reviewed-on: https://chromium-review.googlesource.com/356241
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'board/cr50/gpio.inc')
-rw-r--r-- | board/cr50/gpio.inc | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc index 235a21b116..454fe729bc 100644 --- a/board/cr50/gpio.inc +++ b/board/cr50/gpio.inc @@ -110,9 +110,16 @@ PINMUX(GPIO(SERVO_UART1_OFF), A7, DIO_INPUT) PINMUX(GPIO(SERVO_UART2_ON), B5, DIO_INPUT) PINMUX(GPIO(SERVO_UART2_OFF), B5, DIO_INPUT) -/* I2C pins are bi-directional */ -PINMUX(FUNC(I2C0_SCL), B0, DIO_INPUT) -PINMUX(FUNC(I2C0_SDA), B1, DIO_INPUT) +/* + * I2CS pins are bi-directional and would be configured here as shown. However, + * A1 is also used as a strapping option GPIO input which is configured + * above. If a board is configured (via the strapping pins) to support the I2CS + * interface, then the connection of A1 and A9 to/from the I2C0_SDA and I2C0_SCL + * lines is done in the function i2cs_set_pinmux() which lives in board.c. + * + * PINMUX(FUNC(I2C0_SCL), A9, DIO_INPUT) + * PINMUX(FUNC(I2C0_SDA), A1, DIO_INPUT) +*/ /* * Both SPI master and slave buses are wired directly to specific pads |