diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2017-07-20 09:51:11 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-07-30 22:41:06 -0700 |
| commit | ef213ce62df85749d159547d0282b9519a4e111a (patch) | |
| tree | 48d775519d9ddb6ac2d3f08cd4f915d2536e8a83 /board/cr50/gpio.inc | |
| parent | 90a2060904f4b55f64c341ff985a6a5ee7c5210a (diff) | |
| download | chrome-ec-ef213ce62df85749d159547d0282b9519a4e111a.tar.gz | |
cr50: introduce means of detecting chip running in factory mode
When installed in the factory test rig, the DIOB4 pin is set to high
by the moment the RW section starts.
Software behavior needs to change to comply with the factory test rig
requirements. Define the GPIO and add a function to report the factory
mode state.
BRANCH=cr50
BUG=b:63686091
TEST=tested along with the rest of the stack of patches.
Change-Id: I8c4158fc75138d717fc009496365c8e61b42a890
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/579584
Reviewed-by: Nick Sanders <nsanders@chromium.org>
Diffstat (limited to 'board/cr50/gpio.inc')
| -rw-r--r-- | board/cr50/gpio.inc | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc index fc86447de5..e47f06fabb 100644 --- a/board/cr50/gpio.inc +++ b/board/cr50/gpio.inc @@ -91,6 +91,9 @@ GPIO(SPI_MOSI, PIN(0, 7), GPIO_INPUT) GPIO(SPI_CLK, PIN(0, 8), GPIO_INPUT) GPIO(SPI_CS_L, PIN(0, 9), GPIO_INPUT) +/* Used during *chip* factory process. */ +GPIO(DIOB4, PIN(0, 10), GPIO_INPUT | GPIO_PULL_DOWN) + /* GPIOs used for Cr50 strapping options */ GPIO(STRAP_A0, PIN(1, 12), GPIO_INPUT) GPIO(STRAP_A1, PIN(1, 13), GPIO_INPUT) @@ -190,4 +193,8 @@ PINMUX(GPIO(DETECT_SERVO), B5, DIO_INPUT) PINMUX(GPIO(SPI_MOSI), A4, DIO_OUTPUT) PINMUX(GPIO(SPI_CLK), A8, DIO_OUTPUT) PINMUX(GPIO(SPI_CS_L), A14, DIO_OUTPUT) + +PINMUX(GPIO(DIOB4), B4, DIO_INPUT) + + #undef PINMUX |