summaryrefslogtreecommitdiff
path: root/board/cr50/gpio.inc
diff options
context:
space:
mode:
authorVincent Palatin <vpalatin@chromium.org>2016-07-20 12:55:48 +0200
committerMary Ruthven <mruthven@chromium.org>2016-07-20 21:03:13 +0000
commitdbc2e3e909164f2a7d4301ccab7190f420a6d8cf (patch)
tree1f1d63c42f5aad4d1b3271d2243e9ae69ac77430 /board/cr50/gpio.inc
parent17f02ee5a709ceccc5f9447b120aac8d93008039 (diff)
downloadchrome-ec-dbc2e3e909164f2a7d4301ccab7190f420a6d8cf.tar.gz
cr50: add INA 3V3 load switch GPIO
Add a GPIO to control the INA 3.3V power rail load switch on Reef. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=none TEST=none Change-Id: I2be33ebff376b50f9cc2962db5fc3fa11f4bb107 Reviewed-on: https://chromium-review.googlesource.com/361692 Reviewed-by: Mary Ruthven <mruthven@chromium.org> Tested-by: Mary Ruthven <mruthven@chromium.org>
Diffstat (limited to 'board/cr50/gpio.inc')
-rw-r--r--board/cr50/gpio.inc4
1 files changed, 4 insertions, 0 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc
index 30dd4ec222..14049bb720 100644
--- a/board/cr50/gpio.inc
+++ b/board/cr50/gpio.inc
@@ -55,6 +55,9 @@ GPIO(SPI_MOSI, PIN(0, 7), GPIO_INPUT)
GPIO(SPI_CLK, PIN(0, 8), GPIO_INPUT)
GPIO(SPI_CS_L, PIN(0, 9), GPIO_INPUT)
+/* Control the load switch powering the INA 3.3V rail */
+GPIO(EN_PP3300_INA_L, PIN(1, 9), GPIO_ODR_HIGH)
+
/* Unimplemented signals which we need to emulate for now */
/* TODO(wfrichar): Half the boards don't use this signal. Take it out. */
UNIMPLEMENTED(ENTERING_RW)
@@ -73,6 +76,7 @@ PINMUX(GPIO(INT_AP_L), A5, DIO_INPUT) /* DIOB7 is p_digitial_od */
/* We can't pull it up */
PINMUX(GPIO(EC_FLASH_SELECT), B2, DIO_INPUT)
PINMUX(GPIO(AP_FLASH_SELECT), B3, DIO_INPUT)
+PINMUX(GPIO(EN_PP3300_INA_L), B7, DIO_INPUT)
PINMUX(GPIO(AP_WP_L), M3, 0)
PINMUX(GPIO(SYS_RST_L_IN), M0, 0)
PINMUX(GPIO(SYS_RST_L_OUT), M0, DIO_INPUT)