diff options
| author | Aseda Aboagye <aaboagye@google.com> | 2017-02-28 07:39:12 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-03-07 18:07:32 -0800 |
| commit | ffd1ee934f310a644c03b88fa2ae3e66ec847a04 (patch) | |
| tree | 8b3598d6cc35c4e84663082098a29dd4d3072fbe /board/cr50/gpio.inc | |
| parent | ee263101a9b3b9b1c6133235aeb1a9801df685a1 (diff) | |
| download | chrome-ec-ffd1ee934f310a644c03b88fa2ae3e66ec847a04.tar.gz | |
cr50: Only drive CCD_MODE_L when in CCD mode.
This commit changes the behaviour of handling the CCD_MODE_L pin. When
Cr50 is not in CCD mode, it will stop driving the pin and turn it into
an input. This allows the pin to be driven by the EC. Cr50 will then
poll the CCD_MODE_L pin to see when it is pulled low and then enter CCD
mode. Once the pin is deasserted, CCD mode is disabled.
However, when Cr50 itself makes the decision to enter CCD mode, it
changes the pin from an input to an output and drives the pin low.
NOTE: The rdd interrupt does not directly trigger CCD mode, but now
drives the pin low. A side-effect of the pin going low is that CCD is
enabled. Once Cr50 decides to leave CCD mode, it then reconfigures the
pin to be setup as an input again.
CQ-DEPEND=CL:448988
BUG=b:35804738
BRANCH=cr50
TEST=Flash dev board, use `ccd` console command to both enable and
disable CCD. Verify that when CCD is enabled, the state of DIOM1 does
not disable CCD. Verify that when CCD is disabled, pulling DIOM1 low
enables CCD. Letting it float disables CCD.
TEST=Verify that CCD mode is reflected in the device state.
Change-Id: I44645f28b362977ca6a502b646e4f4ff1a7430c7
Signed-off-by: Aseda Aboagye <aaboagye@google.com>
Reviewed-on: https://chromium-review.googlesource.com/448161
Commit-Ready: Aseda Aboagye <aaboagye@chromium.org>
Tested-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Diffstat (limited to 'board/cr50/gpio.inc')
| -rw-r--r-- | board/cr50/gpio.inc | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc index f2ac78ae1d..824b77f498 100644 --- a/board/cr50/gpio.inc +++ b/board/cr50/gpio.inc @@ -71,9 +71,11 @@ GPIO(AP_FLASH_SELECT, PIN(0, 2), GPIO_OUT_LOW) /* Pull this low to reset the AP. (We reset the EC with the RBOX.) */ GPIO(SYS_RST_L_OUT, PIN(0, 4), GPIO_INPUT) -/* Indicate to EC when CCD is enabled. EC can pull this down too, to tell us if - * it decided instead. The pullup is on the EC's side. */ -GPIO(CCD_MODE_L, PIN(0, 5), GPIO_ODR_HIGH) +/* + * Indicate to EC when CCD is enabled. EC can pull this down too, to tell us if + * it decided instead. + */ +GPIO(CCD_MODE_L, PIN(0, 5), GPIO_INPUT | GPIO_PULL_UP) /* Battery present signal is active low */ GPIO(BATT_PRES_L, PIN(0, 6), GPIO_INPUT) |