diff options
| author | Mary Ruthven <mruthven@chromium.org> | 2020-01-16 12:35:49 -0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-01-17 22:38:01 +0000 |
| commit | 121295d34d8bae1bd9cdbf488632960ada90788d (patch) | |
| tree | 357d6e61bcb854715a61b9e9acb6e0f8c3c9da44 /board/cr50/gpio.inc | |
| parent | efc1dec0302dd717a3d0b6c7d448f63c66042ee3 (diff) | |
| download | chrome-ec-121295d34d8bae1bd9cdbf488632960ada90788d.tar.gz | |
cr50: add support for using a strap pin as a ccd gpio
This change introduces a mechanism which allows to use one of board
strap pins as the CCD gpio and makes DIOA9 the CCD pin on boards with
strap os 0xE.
This change uses 2 bits from the board properties to determine which pin
is used as the ccd gpio.
0 - no ccd gpio
1 - DIOA1
2 - DIOA9
3 - DIOA12
DIOA6 is another strap pin, but there's only one valid strap with a 5kPU
left, so I decided not to use another board property bit to support it
as a possible ccd gpio. I want to save the board property bit, since
we're running out of them and there are so many other I2C straps boards
can use. We can add it later if we need to.
BUG=b:147812066
BRANCH=cr50
TEST=manual. Use pinmux and gpiocfg to verify the output is only enabled
when the gpio is asserted.
no added brdproperties - nothing is different with pinmux
run on Puff
gpioset CCD_REC_LID_SWITCH 0
EC shows recovery button pressed
gpioset CCD_REC_LID_SWITCH 0
EC shows recovery button released
add BOARD_CCD_REC_LID_PIN_DIOA1 to SPI board
pinmux output adds
DIOA1 27 IN GPIO1_GPIO10
GPIO1_GPIO10 24 DIOA1
gpioset CCD_REC_LID_SWITCH 0
gpiocfg shows "GPIO1_GPIO10: read 0 drive 0"
gpioset CCD_REC_LID_SWITCH 1
gpiocfg doesn't show GPIO1_GPIO10 as an output
add BOARD_CCD_REC_LID_PIN_DIOA9 to SPI board
pinmux output adds
DIOA9 27 IN GPIO1_GPIO10
GPIO1_GPIO10 16 DIOA9
gpioset CCD_REC_LID_SWITCH 0
gpiocfg shows "GPIO1_GPIO10: read 0 drive 0"
gpioset CCD_REC_LID_SWITCH 1
gpiocfg doesn't show GPIO1_GPIO10 as an output
add BOARD_CCD_REC_LID_PIN_DIOA12 to I2C board
pinmux output adds
DIOA12 27 IN GPIO1_GPIO10
GPIO1_GPIO10 13 DIOA12
gpioset CCD_REC_LID_SWITCH 0
gpiocfg shows "GPIO1_GPIO10: read 0 drive 0"
gpioset CCD_REC_LID_SWITCH 1
gpiocfg doesn't show GPIO1_GPIO10 as an output
Change-Id: If74385135a572e7e5d0763fad9f5368fdec8d7a0
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2006210
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Diffstat (limited to 'board/cr50/gpio.inc')
| -rw-r--r-- | board/cr50/gpio.inc | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc index 76d6adf0f1..2f2402aea3 100644 --- a/board/cr50/gpio.inc +++ b/board/cr50/gpio.inc @@ -69,6 +69,7 @@ * GPIO1.4 detect_tpm_rst_asserted * GPIO1.5 unwedge_i2cs_scl * GPIO1.6 monitor_i2cs_sda + * GPIO1.10 rec_lid_switch * GPIO1.11 ec_tx_cr50_rx_in * GPIO1.12 strap_a0 * GPIO1.13 strap_a1 @@ -153,6 +154,13 @@ GPIO(SPI_CS_L, PIN(0, 9), GPIO_INPUT) /* Used during *chip* factory process. */ GPIO(DIOB4, PIN(0, 10), GPIO_INPUT | GPIO_PULL_DOWN) +/* + * Used to assert lid open or recovery switch with ccd. This signal is + * guaranteed to have an external pull-up. The pin is connected to the gpio in + * board.c. If the gpio number changes, it needs to be updated in board.c. + */ +GPIO(CCD_REC_LID_SWITCH, PIN(1, 10), GPIO_ODR_HIGH | GPIO_INPUT) + /* GPIOs used for Cr50 strapping options */ GPIO(STRAP_A0, PIN(1, 12), GPIO_INPUT) GPIO(STRAP_A1, PIN(1, 13), GPIO_INPUT) |