Cr50: I2CM: Enable i2c master for accessing INA chips

On both Reef and Gru there are INA (shunt bus voltage monitor) ICs
connected to the Cr50 I2C master bus. The use case for these chips is
in a lab setting using case closed debugging. Power to the INA chips
is controlled by a separate Cr50 gpio signal.

By default, the INAs are powered off and the I2C master bus is not
connected. A function ina_connect() is provided which needs to be
called prior to attempting to access the INAs via I2C.

BRANCH=none
BUG=chrome-os-partner:57059
TEST=manual
Tested both Reef and Gru. Verified that console command 'ccd ina
on|off' works as expected and that can repeatedly read registers on
the INA using the following command "i2cxfer r16 0 0x40 0".
Read 0x2771 [10097] which is the default value. In addition
wrote register 14 (bits 15:1 are writeable) and verified the value was
able to read the value back which was written.

Change-Id: I670f7897555dae29642264531599dc4471c52bbd
Signed-off-by: Scott <scollyer@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/394168
Commit-Ready: Scott Collyer <scollyer@chromium.org>
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

1 files changed, 52 insertions, 1 deletions

diff --git a/board/cr50/rdd.c b/board/cr50/rdd.c
index 623209fa03..4c67b5f1d2 100644
--- a/board/cr50/rdd.c
+++ b/board/cr50/rdd.c
@@ -8,6 +8,7 @@
 #include "device_state.h"
 #include "gpio.h"
 #include "hooks.h"
+#include "i2c.h"
 #include "rbox.h"
 #include "rdd.h"
 #include "registers.h"
@@ -94,6 +95,45 @@ void uartn_tx_disconnect(int uart)
 	uart_select_tx(uart, 0);
 }
 
+void ina_connect(void)
+{
+	/* Apply power to INA chips */
+	gpio_set_level(GPIO_EN_PP3300_INA_L, 0);
+	/* Allow enough time for power rail to come up */
+	usleep(25);
+
+	/*
+	 * Connect B0/B1 pads to I2C0 input SDA/SCL. Note, that the inputs
+	 * for these pads are already enabled for the gpio signals I2C_SCL_INA
+	 * and I2C_SDA_INA in gpio.inc.
+	 */
+	GWRITE(PINMUX, I2C0_SDA_SEL, GC_PINMUX_DIOB1_SEL);
+	GWRITE(PINMUX, I2C0_SCL_SEL, GC_PINMUX_DIOB0_SEL);
+
+	/* Connect I2CS SDA/SCL output to B1/B0 pads */
+	GWRITE(PINMUX, DIOB1_SEL, GC_PINMUX_I2C0_SDA_SEL);
+	GWRITE(PINMUX, DIOB0_SEL, GC_PINMUX_I2C0_SCL_SEL);
+
+	/*
+	 * Initialize the i2cm module after the INAs are powered and the signal
+	 * lines are connected.
+	 */
+	i2cm_init();
+}
+
+void ina_disconnect(void)
+{
+	/* Disonnect I2C0 SDA/SCL output to B1/B0 pads */
+	GWRITE(PINMUX, DIOB1_SEL, 0);
+	GWRITE(PINMUX, DIOB0_SEL, 0);
+	/* Disconnect B1/B0 pads to I2C0 input SDA/SCL */
+	GWRITE(PINMUX, I2C0_SDA_SEL, 0);
+	GWRITE(PINMUX, I2C0_SCL_SEL, 0);
+
+	/* Disable power to INA chips */
+	gpio_set_level(GPIO_EN_PP3300_INA_L, 1);
+}
+
 void rdd_attached(void)
 {
 	/* Indicate case-closed debug mode (active low) */
@@ -198,6 +238,17 @@ static int command_ccd(int argc, char **argv)
 				ec_uart_enabled = 0;
 				uartn_tx_disconnect(UART_EC);
 			}
+		} else if (!strcasecmp("ina", argv[1]) && argc > 2) {
+			if (!parse_bool(argv[2], &val))
+				return EC_ERROR_PARAM2;
+
+			if (val) {
+				ina_connect();
+				ccprintf("CCD: INAs enabled\n");
+			} else {
+				ina_disconnect();
+				ccprintf("CCD: INAs disabled\n");
+			}
 		} else if (argc == 2) {
 			if (!parse_bool(argv[1], &val))
 				return EC_ERROR_PARAM1;
@@ -217,7 +268,7 @@ static int command_ccd(int argc, char **argv)
 	return EC_SUCCESS;
 }
 DECLARE_CONSOLE_COMMAND(ccd, command_ccd,
-			"[uart] [<BOOLEAN>]",
+			"[uart|ina] [<BOOLEAN>]",
 			"Get/set the case closed debug state");
 
 static int command_sys_rst(int argc, char **argv)