diff options
author | Randall Spangler <rspangler@chromium.org> | 2017-07-17 16:23:47 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2017-07-27 19:56:22 -0700 |
commit | 3be8c42996dc69a497025a9a3404cc58154cc234 (patch) | |
tree | 3cdedcac3bbf020ef8e6b02e55097cd6fb8a7bc9 /board/cr50/tpm_nvmem_read.h | |
parent | e03e58c745716241df056750b765d1c7d5985b62 (diff) | |
download | chrome-ec-3be8c42996dc69a497025a9a3404cc58154cc234.tar.gz |
cr50: Preserve CCD state across deep sleep
Define two bits in a long-life register to hold the current CCD state
across deep sleep. Update the bits on CCD config change, and restore
them on init.
This is necessary because Cr50 loses RAM contents on deep sleep. It
would be really inconvenient to open CCD, get a cup of coffee, and
come back to find CCD has locked again because Cr50 was idle too long.
See go/cr50-ccd-wp for more information.
BUG=b:62537474
BRANCH=cr50
TEST=manual with CR50_DEV=1 build
ccdinfo --> state=opened
idle d
ccdunlock
ccdinfo --> state=unlocked
(wait for deep sleep)
sysinfo --> reset flags = hibernate wake-pin
ccdinfo --> state=unlocked
reboot
sysinfo --> reset flags = hard
ccdinfo --> state=opened
Change-Id: I7864f374af5c159bc9691b094958fb030f3cb8ad
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/575996
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
Diffstat (limited to 'board/cr50/tpm_nvmem_read.h')
0 files changed, 0 insertions, 0 deletions