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authorVadim Bendebury <vbendeb@chromium.org>2015-08-07 16:10:14 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-08-11 02:58:45 +0000
commit1b53f74664ff638745745666059e56f43f5c4f14 (patch)
tree4b85a48eafbe83e185f0498bf7bc546630fc886b /board/cr50
parent953f4b75a974cb5ae074a68c1dd0d1bfc7e1593c (diff)
downloadchrome-ec-1b53f74664ff638745745666059e56f43f5c4f14.tar.gz
cr50: code modifications to support FPGA B1
The new FPGA version adds a lot of few features, while temporarily cutting off some existing capabilities like clocking configuration (hardwared clocks used instead), pinmux assignment for SPS interface (hardwared connections used), etc. This patch removes some now unused code, modifies some configuration items and adds TODO_FGPA comment blocks highlighting code which needs to be reviews next time FPGA version changes). The new register definitions file is derived from hardware description. BRANCH=none BUG=chrome-os-partner:43791 TEST=with these changes in place the B1 board boots to the console prompt. Change-Id: I78ec6b2831a44cbfd40ee726a5d3c2cc11bf2cfa Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/291855 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
Diffstat (limited to 'board/cr50')
-rw-r--r--board/cr50/gpio.inc5
1 files changed, 3 insertions, 2 deletions
diff --git a/board/cr50/gpio.inc b/board/cr50/gpio.inc
index 624221cc6b..3439393f68 100644
--- a/board/cr50/gpio.inc
+++ b/board/cr50/gpio.inc
@@ -64,9 +64,10 @@ ALTERNATE(PIN_MASK(LED_5, DIO(A12)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(LED_6, DIO(A13)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(LED_7, DIO(A14)), 0, MODULE_GPIO, DIO_INPUT)
-/* SPS IOs */
+/* SPS IOs This is not needed for the FPGA, it is hardwired
+ * TODO_FPGA (might have to be modified for a new version)
ALTERNATE(PIN_MASK(FUNC(SPS0_SPICLK), DIO(A2)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(FUNC(SPS0_SPIMOSI), DIO(A3)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(FUNC(SPS0_SPICSB), DIO(A4)), 0, MODULE_GPIO, DIO_INPUT)
ALTERNATE(PIN_MASK(FUNC(SPS0_SPIMISO), DIO(A5)), 0, MODULE_GPIO, DIO_OUTPUT)
-
+*/