diff options
| author | Steven Jian <steven.jian@intel.com> | 2015-04-01 01:25:42 +0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-05-27 03:58:16 +0000 |
| commit | 937cc8a64e5971def21303e7a19a4ad9553e0ace (patch) | |
| tree | 321543152e0c4d61e686ca7b92edd0d027bb168b /board/cyan | |
| parent | e216906c9327655d71b8758b7f11c2f744e55018 (diff) | |
| download | chrome-ec-937cc8a64e5971def21303e7a19a4ad9553e0ace.tar.gz | |
mec1322: Simplify GPIO lists
Our existing GPIO macros use port# / gpio#, but the concept of different
GPIO ports does not exist on the mec1322. Therefore, add new GPIO macros
for chips which do not have distinct GPIO ports.
BUG=None
BRANCH=None
TEST=make buildall -j
Change-Id: Ibda97c6563ad447d16dab39ecadab43ccb25174b
Signed-off-by: Steven Jian <steven.jian@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/262841
Reviewed-by: Anton Staaf <robotboy@chromium.org>
Diffstat (limited to 'board/cyan')
| -rw-r--r-- | board/cyan/gpio.inc | 224 | ||||
| -rw-r--r-- | board/cyan/lfw/gpio.inc | 10 |
2 files changed, 117 insertions, 117 deletions
diff --git a/board/cyan/gpio.inc b/board/cyan/gpio.inc index 0a8b5af85d..ab3410b33c 100644 --- a/board/cyan/gpio.inc +++ b/board/cyan/gpio.inc @@ -5,122 +5,122 @@ * found in the LICENSE file. */ -GPIO_INT(LID_OPEN, PORT(2), 7, GPIO_INT_BOTH_DSLEEP, lid_interrupt) /* Lid switch */ -GPIO_INT(AC_PRESENT, PORT(3), 0, GPIO_INT_BOTH_DSLEEP, extpower_interrupt) /* BC_ACOK / EC_ACIN - to know if battery or AC connected */ -GPIO_INT(WP_L, PORT(3), 3, GPIO_INT_BOTH, switch_interrupt) /* Write protect input */ -GPIO_INT(POWER_BUTTON_L, PORT(3), 5, GPIO_INT_BOTH_DSLEEP, power_button_interrupt) /* Power button */ -GPIO_INT(RSMRST_L_PGOOD, PORT(6), 3, GPIO_INT_BOTH, power_signal_interrupt) /* RSMRST_N_PWRGD from power logic */ -GPIO_INT(ALL_SYS_PGOOD, PORT(13), 0, GPIO_INT_BOTH_DSLEEP, power_signal_interrupt) /* ALL_SYS_PWRGD from power logic */ -GPIO_INT(PCH_SLP_S4_L, PORT(20), 0, GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, power_signal_interrupt) /* SLP_S4# signal from PCH */ -GPIO_INT(PCH_SLP_S3_L, PORT(20), 6, GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, power_signal_interrupt) /* SLP_S3# signal from PCH */ - -GPIO(NC_012, PORT(1), 2, GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(USB_ILIM_SEL, PORT(1), 3, GPIO_OUT_HIGH) /* USB current control */ -GPIO(I2C0_0_SCL, PORT(1), 5, GPIO_ODR_HIGH) -GPIO(I2C0_0_SDA, PORT(1), 6, GPIO_ODR_HIGH) -GPIO(BOARD_ID2, PORT(1), 7, GPIO_INPUT) /* Board ID */ - -GPIO(I2C2_SCL, PORT(2), 0, GPIO_ODR_HIGH) -GPIO(I2C2_SDA, PORT(2), 1, GPIO_ODR_HIGH) -GPIO(I2C1_SCL, PORT(2), 2, GPIO_ODR_HIGH) -GPIO(I2C1_SDA, PORT(2), 3, GPIO_ODR_HIGH) -GPIO(I2C3_SCL, PORT(2), 4, GPIO_ODR_HIGH) -GPIO(I2C3_SDA, PORT(2), 5, GPIO_ODR_HIGH) -GPIO(PCH_SCI_L, PORT(2), 6, GPIO_ODR_HIGH) /* SCI output */ - -GPIO(NC_31, PORT(3), 1, GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(NC_34, PORT(3), 4, GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(USB2_PWR_EN, PORT(3), 6, GPIO_OUT_LOW) /* Enable power for USB2 Port */ - -GPIO(ENTERING_RW, PORT(4), 1, GPIO_OUT_LOW) /* Indicate when EC is entering RW code */ -GPIO(PCH_SMI_L, PORT(4), 4, GPIO_ODR_HIGH) /* SMI output */ -GPIO(USB_OC1_L, PORT(4), 5, GPIO_INT_FALLING) /* DB2 BC1.2 over current signal to EC */ -GPIO(NC_46, PORT(4), 6, GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(NC_47, PORT(4), 7, GPIO_INPUT | GPIO_PULL_UP) /* NC */ - -GPIO(TOUCHPANEL_PWREN, PORT(5), 0, GPIO_OUT_HIGH) /* Enable power for Touch Panel */ -GPIO(PCH_SUS_STAT_L, PORT(5), 1, GPIO_INT_FALLING) /* Signal to inform EC that SOC is entering low power state */ -GPIO(TP_INT_DISABLE, PORT(5), 2, GPIO_OUT_LOW) /* Disable Track Pad interrupt */ -GPIO(TRACKPAD_PWREN, PORT(5), 3, GPIO_OUT_HIGH) /* Enable power for Track Pad */ -GPIO(USB_OC0_L, PORT(5), 5, GPIO_INT_FALLING) /* Over current signal of the BC1.2 charger to EC */ -GPIO(NC_56, PORT(5), 6, GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(NC_57, PORT(5), 7, GPIO_INPUT | GPIO_PULL_UP) /* NC */ - -GPIO(CHGR_PMON, PORT(6), 0, GPIO_ANALOG) -GPIO(WIFI_PWREN, PORT(6), 1, GPIO_OUT_HIGH) /* Enable power for WiFi */ -GPIO(BATT_EN_L, PORT(6), 2, GPIO_INPUT) /* Will be NC */ -GPIO(NC_64, PORT(6), 4, GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(PCH_SYS_PWROK, PORT(6), 5, GPIO_OUT_LOW) /* EC thinks everything is up and ready (DELAY_ALL_SYS_PWRGD) */ -GPIO(PCH_WAKE_L, PORT(6), 6, GPIO_ODR_HIGH) /* PCH wake pin */ -GPIO(USB3_PWR_EN, PORT(6), 7, GPIO_OUT_LOW) /* Enable power for USB3 Port */ - -GPIO(USB_CTL1, PORT(10), 5, GPIO_OUT_HIGH) /* USB charging mode control */ - -GPIO(PCH_RCIN_L, PORT(11), 0, GPIO_ODR_HIGH) /* Reset line to PCH (for 8042 emulation) */ -GPIO(NC_115, PORT(11), 5, GPIO_INPUT | GPIO_PULL_UP) /* NC */ - -GPIO(NC_122, PORT(12), 2, GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(EC_STRAP_GPIO1, PORT(12), 3, GPIO_OUT_LOW) -GPIO(NC_124, PORT(12), 4, GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(GYRO_INT2, PORT(12), 7, GPIO_INT_FALLING) /* Gyro sensor interrupt 2 to EC */ - -GPIO(NC_132, PORT(13), 2, GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(BAT_LED0_L, PORT(13), 3, GPIO_ODR_HIGH) /* Battery charging LED - blue */ -GPIO(BOARD_ID1, PORT(13), 4, GPIO_INPUT) /* Board ID */ -GPIO(WWAN_PWREN, PORT(13), 5, GPIO_OUT_HIGH) /* Enable power for WWAN - PROBE_DETECT_L */ -GPIO(BAT_LED1_L, PORT(13), 6, GPIO_ODR_HIGH) /* Battery charging LED - orange */ - -GPIO(NC_140, PORT(14), 0, GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(PWR_LED0_L, PORT(14), 1, GPIO_ODR_HIGH) /* Power LED - blue */ -GPIO(PCH_RSMRST_L, PORT(14), 3, GPIO_OUT_LOW) /* RSMRST_N to PCH */ -GPIO(PWR_LED1_L, PORT(14), 5, GPIO_ODR_HIGH) /* Power LED - orange */ -GPIO(PVT_CS0, PORT(14), 6, GPIO_ODR_HIGH) /* SPI PVT Chip select */ -GPIO(EC_KBD_ALERT, PORT(14), 7, GPIO_OUT_HIGH) - -GPIO(WLAN_OFF_L, PORT(15), 0, GPIO_ODR_HIGH) /* Wireless LAN */ -GPIO(CPU_PROCHOT, PORT(15), 1, GPIO_OUT_LOW) -GPIO(KBD_IRQ_L, PORT(15), 2, GPIO_ODR_HIGH) /* Negative edge triggered irq. */ -GPIO(BOARD_ID0, PORT(15), 4, GPIO_INPUT) /* Board ID */ -GPIO(CORE_PWROK, PORT(15), 5, GPIO_ODR_HIGH) /* CORE_PWR_OK_R */ -GPIO(LID_OPEN2, PORT(15), 6, GPIO_INT_BOTH_DSLEEP) /* LID_OPEN_OUT2_R */ -GPIO(PCH_SUSPWRDNACK, PORT(15), 7, GPIO_INT_FALLING) /* PMC SUSPWRDNACK signal from SOC to EC */ - -GPIO(PCH_PWRBTN_L, PORT(16), 0, GPIO_OUT_HIGH) /* Power button output to PCH */ -GPIO(GYRO_INT1, PORT(16), 1, GPIO_INT_FALLING) /* Gyro sensor interrupt 1 to EC */ -GPIO(NC_163, PORT(16), 3, GPIO_INPUT | GPIO_PULL_UP) /* NC */ - -GPIO(STARTUP_LATCH_SET, PORT(20), 1, GPIO_OUT_HIGH) -GPIO(EC_BL_DISABLE_L, PORT(20), 2, GPIO_OUT_HIGH) /* EDP backligh disable signal from EC */ -GPIO(SMC_SHUTDOWN, PORT(20), 3, GPIO_OUT_LOW) /* Shutdown signal from EC to power sequencing PLD */ -GPIO(NC_204, PORT(20), 4, GPIO_INPUT | GPIO_PULL_UP) /* NC */ - -GPIO(SUSPWRDNACK_SOC_EC,PORT(21), 0, GPIO_OUT_LOW) /* SUSPWRDNACK signal from EC to MOIC device */ -GPIO(PCH_SLP_SX_L, PORT(21), 1, GPIO_INT_BOTH_DSLEEP) /* Sleep SOIX signal from SOC to EC */ +GPIO_INT(LID_OPEN, PIN(27), GPIO_INT_BOTH_DSLEEP, lid_interrupt) /* Lid switch */ +GPIO_INT(AC_PRESENT, PIN(30), GPIO_INT_BOTH_DSLEEP, extpower_interrupt) /* BC_ACOK / EC_ACIN - to know if battery or AC connected */ +GPIO_INT(WP_L, PIN(33), GPIO_INT_BOTH, switch_interrupt) /* Write protect input */ +GPIO_INT(POWER_BUTTON_L, PIN(35), GPIO_INT_BOTH_DSLEEP, power_button_interrupt) /* Power button */ +GPIO_INT(RSMRST_L_PGOOD, PIN(63), GPIO_INT_BOTH, power_signal_interrupt) /* RSMRST_N_PWRGD from power logic */ +GPIO_INT(ALL_SYS_PGOOD, PIN(130), GPIO_INT_BOTH_DSLEEP, power_signal_interrupt) /* ALL_SYS_PWRGD from power logic */ +GPIO_INT(PCH_SLP_S4_L, PIN(200), GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, power_signal_interrupt) /* SLP_S4# signal from PCH */ +GPIO_INT(PCH_SLP_S3_L, PIN(206), GPIO_INT_BOTH_DSLEEP | GPIO_PULL_UP, power_signal_interrupt) /* SLP_S3# signal from PCH */ + +GPIO(NC_012, PIN(12), GPIO_INPUT | GPIO_PULL_UP) /* NC */ +GPIO(USB_ILIM_SEL, PIN(13), GPIO_OUT_HIGH) /* USB current control */ +GPIO(I2C0_0_SCL, PIN(15), GPIO_ODR_HIGH) +GPIO(I2C0_0_SDA, PIN(16), GPIO_ODR_HIGH) +GPIO(BOARD_ID2, PIN(17), GPIO_INPUT) /* Board ID */ + +GPIO(I2C2_SCL, PIN(20), GPIO_ODR_HIGH) +GPIO(I2C2_SDA, PIN(21), GPIO_ODR_HIGH) +GPIO(I2C1_SCL, PIN(22), GPIO_ODR_HIGH) +GPIO(I2C1_SDA, PIN(23), GPIO_ODR_HIGH) +GPIO(I2C3_SCL, PIN(24), GPIO_ODR_HIGH) +GPIO(I2C3_SDA, PIN(25), GPIO_ODR_HIGH) +GPIO(PCH_SCI_L, PIN(26), GPIO_ODR_HIGH) /* SCI output */ + +GPIO(NC_31, PIN(31), GPIO_INPUT | GPIO_PULL_UP) /* NC */ +GPIO(NC_34, PIN(34), GPIO_INPUT | GPIO_PULL_UP) /* NC */ +GPIO(USB2_PWR_EN, PIN(36), GPIO_OUT_LOW) /* Enable power for USB2 Port */ + +GPIO(ENTERING_RW, PIN(41), GPIO_OUT_LOW) /* Indicate when EC is entering RW code */ +GPIO(PCH_SMI_L, PIN(44), GPIO_ODR_HIGH) /* SMI output */ +GPIO(USB_OC1_L, PIN(45), GPIO_INT_FALLING) /* DB2 BC1.2 over current signal to EC */ +GPIO(NC_46, PIN(46), GPIO_INPUT | GPIO_PULL_UP) /* NC */ +GPIO(NC_47, PIN(47), GPIO_INPUT | GPIO_PULL_UP) /* NC */ + +GPIO(TOUCHPANEL_PWREN, PIN(50), GPIO_OUT_HIGH) /* Enable power for Touch Panel */ +GPIO(PCH_SUS_STAT_L, PIN(51), GPIO_INT_FALLING) /* Signal to inform EC that SOC is entering low power state */ +GPIO(TP_INT_DISABLE, PIN(52), GPIO_OUT_LOW) /* Disable Track Pad interrupt */ +GPIO(TRACKPAD_PWREN, PIN(53), GPIO_OUT_HIGH) /* Enable power for Track Pad */ +GPIO(USB_OC0_L, PIN(55), GPIO_INT_FALLING) /* Over current signal of the BC1.2 charger to EC */ +GPIO(NC_56, PIN(56), GPIO_INPUT | GPIO_PULL_UP) /* NC */ +GPIO(NC_57, PIN(57), GPIO_INPUT | GPIO_PULL_UP) /* NC */ + +GPIO(CHGR_PMON, PIN(60), GPIO_ANALOG) +GPIO(WIFI_PWREN, PIN(61), GPIO_OUT_HIGH) /* Enable power for WiFi */ +GPIO(BATT_EN_L, PIN(62), GPIO_INPUT) /* Will be NC */ +GPIO(NC_64, PIN(64), GPIO_INPUT | GPIO_PULL_UP) /* NC */ +GPIO(PCH_SYS_PWROK, PIN(65), GPIO_OUT_LOW) /* EC thinks everything is up and ready (DELAY_ALL_SYS_PWRGD) */ +GPIO(PCH_WAKE_L, PIN(66), GPIO_ODR_HIGH) /* PCH wake pin */ +GPIO(USB3_PWR_EN, PIN(67), GPIO_OUT_LOW) /* Enable power for USB3 Port */ + +GPIO(USB_CTL1, PIN(105), GPIO_OUT_HIGH) /* USB charging mode control */ + +GPIO(PCH_RCIN_L, PIN(110), GPIO_ODR_HIGH) /* Reset line to PCH (for 8042 emulation) */ +GPIO(NC_115, PIN(115), GPIO_INPUT | GPIO_PULL_UP) /* NC */ + +GPIO(NC_122, PIN(122), GPIO_INPUT | GPIO_PULL_UP) /* NC */ +GPIO(EC_STRAP_GPIO1, PIN(123), GPIO_OUT_LOW) +GPIO(NC_124, PIN(124), GPIO_INPUT | GPIO_PULL_UP) /* NC */ +GPIO(GYRO_INT2, PIN(127), GPIO_INT_FALLING) /* Gyro sensor interrupt 2 to EC */ + +GPIO(NC_132, PIN(132), GPIO_INPUT | GPIO_PULL_UP) /* NC */ +GPIO(BAT_LED0_L, PIN(133), GPIO_ODR_HIGH) /* Battery charging LED - blue */ +GPIO(BOARD_ID1, PIN(134), GPIO_INPUT) /* Board ID */ +GPIO(WWAN_PWREN, PIN(135), GPIO_OUT_HIGH) /* Enable power for WWAN - PROBE_DETECT_L */ +GPIO(BAT_LED1_L, PIN(136), GPIO_ODR_HIGH) /* Battery charging LED - orange */ + +GPIO(NC_140, PIN(140), GPIO_INPUT | GPIO_PULL_UP) /* NC */ +GPIO(PWR_LED0_L, PIN(141), GPIO_ODR_HIGH) /* Power LED - blue */ +GPIO(PCH_RSMRST_L, PIN(143), GPIO_OUT_LOW) /* RSMRST_N to PCH */ +GPIO(PWR_LED1_L, PIN(145), GPIO_ODR_HIGH) /* Power LED - orange */ +GPIO(PVT_CS0, PIN(146), GPIO_ODR_HIGH) /* SPI PVT Chip select */ +GPIO(EC_KBD_ALERT, PIN(147), GPIO_OUT_HIGH) + +GPIO(WLAN_OFF_L, PIN(150), GPIO_ODR_HIGH) /* Wireless LAN */ +GPIO(CPU_PROCHOT, PIN(151), GPIO_OUT_LOW) +GPIO(KBD_IRQ_L, PIN(152), GPIO_ODR_HIGH) /* Negative edge triggered irq. */ +GPIO(BOARD_ID0, PIN(154), GPIO_INPUT) /* Board ID */ +GPIO(CORE_PWROK, PIN(155), GPIO_ODR_HIGH) /* CORE_PWR_OK_R */ +GPIO(LID_OPEN2, PIN(156), GPIO_INT_BOTH_DSLEEP) /* LID_OPEN_OUT2_R */ +GPIO(PCH_SUSPWRDNACK, PIN(157), GPIO_INT_FALLING) /* PMC SUSPWRDNACK signal from SOC to EC */ + +GPIO(PCH_PWRBTN_L, PIN(160), GPIO_OUT_HIGH) /* Power button output to PCH */ +GPIO(GYRO_INT1, PIN(161), GPIO_INT_FALLING) /* Gyro sensor interrupt 1 to EC */ +GPIO(NC_163, PIN(163), GPIO_INPUT | GPIO_PULL_UP) /* NC */ + +GPIO(STARTUP_LATCH_SET, PIN(201), GPIO_OUT_HIGH) +GPIO(EC_BL_DISABLE_L, PIN(202), GPIO_OUT_HIGH) /* EDP backligh disable signal from EC */ +GPIO(SMC_SHUTDOWN, PIN(203), GPIO_OUT_LOW) /* Shutdown signal from EC to power sequencing PLD */ +GPIO(NC_204, PIN(204), GPIO_INPUT | GPIO_PULL_UP) /* NC */ + +GPIO(SUSPWRDNACK_SOC_EC,PIN(210), GPIO_OUT_LOW) /* SUSPWRDNACK signal from EC to MOIC device */ +GPIO(PCH_SLP_SX_L, PIN(211), GPIO_INT_BOTH_DSLEEP) /* Sleep SOIX signal from SOC to EC */ /* Alternate functions GPIO definition */ -ALTERNATE(PORT(16), 0x24, 1, MODULE_UART, 0) /* UART0 */ +ALTERNATE(PIN_MASK(16, 0x24), 1, MODULE_UART, 0) /* UART0 */ -ALTERNATE(PORT(1), 0x60, 2, MODULE_I2C, GPIO_PULL_UP) /* I2C0: Battery Charger */ -ALTERNATE(PORT(2), 0x3f, 2, MODULE_I2C, GPIO_PULL_UP) /* I2C1: Motion Sensor / I2C2: SOC / I2C3: Temp Sensor */ +ALTERNATE(PIN_MASK(1, 0x60), 2, MODULE_I2C, GPIO_PULL_UP) /* I2C0: Battery Charger */ +ALTERNATE(PIN_MASK(2, 0x3f), 2, MODULE_I2C, GPIO_PULL_UP) /* I2C1: Motion Sensor / I2C2: SOC / I2C3: Temp Sensor */ -ALTERNATE(PORT(0), 0xfc, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) -ALTERNATE(PORT(1), 0x03, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) -ALTERNATE(PORT(10) , 0xd8, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) +ALTERNATE(PIN_MASK(0, 0xfc), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) +ALTERNATE(PIN_MASK(1, 0x03), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) +ALTERNATE(PIN_MASK(10, 0xd8), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) #ifdef CONFIG_KEYBOARD_COL2_INVERTED - GPIO(KBD_KSO2, PORT(0),1, GPIO_KB_OUTPUT_COL2) /* Negative edge triggered irq. */ + GPIO(KBD_KSO2, PIN(1), GPIO_KB_OUTPUT_COL2) /* Negative edge triggered irq. */ #else - ALTERNATE(PORT(0), 0x02, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT_COL2) + ALTERNATE(PIN_MASK(0, 0x02), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT_COL2) #endif -ALTERNATE(PORT(3), 0x04, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) -ALTERNATE(PORT(4), 0x0d, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) -ALTERNATE(PORT(12), 0x60, 2, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) -ALTERNATE(PORT(14), 0x14, 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) - -ALTERNATE(PORT(1), 0x10, 1, MODULE_LPC, 0) /* 14: CLKRUN# */ -ALTERNATE(PORT(11), 0x9e, 1, MODULE_LPC, 0) /* 111~114: LAD[0:3], 117: PCI_CLK */ -ALTERNATE(PORT(11), 0x40, 1, MODULE_LPC, GPIO_INT_BOTH) /* 116: LRESET# */ -ALTERNATE(PORT(12), 0x01, 1, MODULE_LPC, 0) /* 120: LFRAME# */ - -ALTERNATE(PORT(5), 0x10, 1, MODULE_SPI, 0) /* 54: MOSI */ -ALTERNATE(PORT(16), 0x10, 1, MODULE_SPI, 0) /* 164: MISO */ -ALTERNATE(PORT(15), 0x08, 1, MODULE_SPI, 0) /* 153: CLK */ +ALTERNATE(PIN_MASK(3, 0x04), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) +ALTERNATE(PIN_MASK(4, 0x0d), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) +ALTERNATE(PIN_MASK(12, 0x60), 2, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) +ALTERNATE(PIN_MASK(14, 0x14), 3, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) + +ALTERNATE(PIN_MASK(1, 0x10), 1, MODULE_LPC, 0) /* 14: CLKRUN# */ +ALTERNATE(PIN_MASK(11, 0x9e), 1, MODULE_LPC, 0) /* 111~114: LAD[0:3], 117: PCI_CLK */ +ALTERNATE(PIN_MASK(11, 0x40), 1, MODULE_LPC, GPIO_INT_BOTH) /* 116: LRESET# */ +ALTERNATE(PIN_MASK(12, 0x01), 1, MODULE_LPC, 0) /* 120: LFRAME# */ + +ALTERNATE(PIN_MASK(5, 0x10), 1, MODULE_SPI, 0) /* 54: MOSI */ +ALTERNATE(PIN_MASK(16, 0x10), 1, MODULE_SPI, 0) /* 164: MISO */ +ALTERNATE(PIN_MASK(15, 0x08), 1, MODULE_SPI, 0) /* 153: CLK */ diff --git a/board/cyan/lfw/gpio.inc b/board/cyan/lfw/gpio.inc index d1bb19cfcb..122aff0cdf 100644 --- a/board/cyan/lfw/gpio.inc +++ b/board/cyan/lfw/gpio.inc @@ -7,10 +7,10 @@ * Minimal set of GPIOs needed for LFW loader */ -GPIO(PVT_CS0, PORT(14), 6, GPIO_ODR_HIGH) /* SPI PVT Chip select */ +GPIO(PVT_CS0, PIN(146), GPIO_ODR_HIGH) /* SPI PVT Chip select */ /* Alternate functions GPIO definition */ -ALTERNATE(PORT(16), 0x24, 1, MODULE_UART, 0) /* UART0 */ -ALTERNATE(PORT(5), 0x10, 1, MODULE_SPI, 0) -ALTERNATE(PORT(16), 0x10, 1, MODULE_SPI, 0) -ALTERNATE(PORT(15), 0x08, 1, MODULE_SPI, 0) /* 153: CLK */ +ALTERNATE(PIN_MASK(16, 0x24), 1, MODULE_UART, 0) /* UART0 */ +ALTERNATE(PIN_MASK(5, 0x10), 1, MODULE_SPI, 0) +ALTERNATE(PIN_MASK(16, 0x10), 1, MODULE_SPI, 0) +ALTERNATE(PIN_MASK(15, 0x08), 1, MODULE_SPI, 0) /* 153: CLK */ |