diff options
| author | Edward Hill <ecgh@chromium.org> | 2020-02-26 14:27:23 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-02-27 00:56:17 +0000 |
| commit | 29918a71d3622f9c9da9a4db37bb1843ce8f3284 (patch) | |
| tree | 8ef38395d1e97fee669af2fb62ef2ea285f710ee /board/dalboz/gpio.inc | |
| parent | 331de6dbdf9b024d4c3f6e183df868d3f7cabac2 (diff) | |
| download | chrome-ec-29918a71d3622f9c9da9a4db37bb1843ce8f3284.tar.gz | |
dalboz: update GPIOs
BUG=b:147297680
BRANCH=none
TEST=able to boot dalboz AP
Signed-off-by: Edward Hill <ecgh@chromium.org>
Change-Id: I4a3ec2a77292e48672f5c6143990c36b9a80b6a6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2073277
Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Commit-Queue: Denis Brockus <dbrockus@chromium.org>
Diffstat (limited to 'board/dalboz/gpio.inc')
| -rw-r--r-- | board/dalboz/gpio.inc | 16 |
1 files changed, 3 insertions, 13 deletions
diff --git a/board/dalboz/gpio.inc b/board/dalboz/gpio.inc index fd9efe7816..5916fc2976 100644 --- a/board/dalboz/gpio.inc +++ b/board/dalboz/gpio.inc @@ -37,43 +37,33 @@ GPIO(EC_AP_INT_ODL, PIN(A, 3), GPIO_ODR_HIGH) /* Sensor MKBP event to SOC */ GPIO(EN_PWR_A, PIN(B, 7), GPIO_OUT_LOW) /* Enable Power */ GPIO(EC_EDP_BL_DISABLE, PIN(A, 2), GPIO_OUT_HIGH) /* Enable Backlight */ GPIO(EC_ENTERING_RW, PIN(E, 5), GPIO_OUT_LOW) /* EC Entering RW */ -GPIO(EC_FCH_PWR_BTN_L, PIN(6, 2), GPIO_OUT_HIGH) /* Power Button to SOC */ -GPIO(EC_FCH_PWR_BTN_L_V0, PIN(8, 6), GPIO_OUT_HIGH) /* Power Button to SOC */ +GPIO(EC_FCH_PWR_BTN_L, PIN(6, 7), GPIO_OUT_HIGH) /* Power Button to SOC */ GPIO(EC_FCH_RSMRST_L, PIN(A, 1), GPIO_OUT_LOW) /* RSMRST# to SOC */ -GPIO(EC_FCH_PWROK, PIN(D, 3), GPIO_OUT_LOW) /* Power OK to SOC */ -GPIO(EC_FCH_PWROK_V0, PIN(7, 5), GPIO_OUT_LOW) /* Power OK to SOC */ +GPIO(EC_FCH_PWROK, PIN(7, 0), GPIO_OUT_LOW) /* Power OK to SOC */ GPIO(EC_FCH_WAKE_L, PIN(0, 3), GPIO_OUT_HIGH) /* Wake SOC */ GPIO(EC_SYS_RST_L, PIN(C, 7), GPIO_ODR_HIGH) /* Cold Reset to SOC */ GPIO(USB_C0_TCPC_RST_L, PIN(E, 1), GPIO_OUT_HIGH) /* C0 TCPC Reset */ GPIO(USB_C1_TCPC_RST_L, PIN(F, 0), GPIO_OUT_HIGH) /* C1 TCPC Reset */ -GPIO(USB_C0_HPD, PIN(F, 5), GPIO_OUT_LOW) /* C0 DP Hotplug Detect */ -GPIO(USB_C0_IN_HPD, PIN(7, 3), GPIO_OUT_LOW) /* C0 IN Hotplug Detect */ +GPIO(USB3_C0_DP2_HPD, PIN(F, 5), GPIO_OUT_LOW) /* C0 DP Hotplug Detect */ GPIO(DP1_HPD, PIN(F, 4), GPIO_OUT_LOW) /* C1 DP Hotplug Detect */ -GPIO(DP2_HPD, PIN(C, 1), GPIO_OUT_LOW) /* C1 DP Hotplug Detect */ GPIO(LED_FULL_L, PIN(6, 0), GPIO_OUT_HIGH) GPIO(LED_CHRG_L, PIN(C, 0), GPIO_OUT_HIGH) IOEX_INT(HDMI_CONN_HPD_3V3_DB, EXPIN(USBC_PORT_C1, 1, 0), GPIO_INT_BOTH, hdmi_hpd_interrupt) -IOEX_INT(MST_HPD_OUT, EXPIN(USBC_PORT_C1, 0, 3), GPIO_INT_BOTH, mst_hpd_interrupt) -IOEX(USB_A0_RETIMER_EN, EXPIN(USBC_PORT_C0, 0, 0), GPIO_OUT_LOW) /* A0 Retimer Enable */ -IOEX(USB_A0_RETIMER_RST, EXPIN(USBC_PORT_C0, 0, 1), GPIO_OUT_LOW) /* A0 Retimer Reset */ IOEX(USB_C0_FAULT_ODL, EXPIN(USBC_PORT_C0, 0, 3), GPIO_ODR_HIGH) /* C0 Fault to SOC */ IOEX(USB_C0_TCPC_FASTSW_CTL_EN, EXPIN(USBC_PORT_C0, 0, 4), GPIO_OUT_LOW) /* C0 FastSwitch Control */ IOEX(USB_C1_FAULT_ODL, EXPIN(USBC_PORT_C0, 1, 0), GPIO_ODR_HIGH) /* C1 Fault to SOC */ IOEX(USB_C0_PPC_ILIM_3A_EN, EXPIN(USBC_PORT_C0, 1, 1), GPIO_OUT_LOW) /* C0 3A Current Limit Enable */ IOEX(USB_C0_SBU_FAULT_ODL, EXPIN(USBC_PORT_C0, 1, 2), GPIO_INPUT) /* C0 SBU Fault */ IOEX(KB_BL_EN, EXPIN(USBC_PORT_C0, 1, 3), GPIO_OUT_LOW) /* KB Backlight Enable */ -IOEX(USB_C0_DATA_EN, EXPIN(USBC_PORT_C0, 1, 4), GPIO_OUT_LOW) /* C0 Data Enable */ IOEX(EN_USB_A0_5V, EXPIN(USBC_PORT_C0, 1, 5), GPIO_OUT_LOW) /* A0 5V Source Enable */ IOEX(USB_A0_CHARGE_EN_L, EXPIN(USBC_PORT_C0, 1, 6), GPIO_OUT_HIGH) /* A0 5V High Current Enable */ IOEX(USB_A1_RETIMER_EN, EXPIN(USBC_PORT_C1, 0, 0), GPIO_OUT_LOW) /* A1 Retimer Enable */ -IOEX(USB_A1_RETIMER_RST_DB, EXPIN(USBC_PORT_C1, 0, 1), GPIO_OUT_LOW) /* A1 Retimer Reset */ IOEX(USB_C1_HPD_IN_DB, EXPIN(USBC_PORT_C1, 0, 2), GPIO_OUT_LOW) /* C1 HPD */ IOEX(USB_C1_TCPC_FASTSW_CTL_EN, EXPIN(USBC_PORT_C1, 0, 4), GPIO_OUT_LOW) /* C1 FastSwitch Control */ -IOEX(USB_C1_MUX_RST_DB, EXPIN(USBC_PORT_C1, 1, 1), GPIO_OUT_LOW) /* C1 Mux Reset */ IOEX(USB_C1_SBU_FAULT_DB_ODL, EXPIN(USBC_PORT_C1, 1, 2), GPIO_INPUT) /* C1 SBU Fault */ IOEX(USB_C1_PPC_EN_L, EXPIN(USBC_PORT_C1, 1, 3), GPIO_OUT_LOW) /* C1 PPC Enable */ IOEX(HDMI_DATA_EN_DB, EXPIN(USBC_PORT_C1, 1, 4), GPIO_OUT_HIGH) /* HDMI Retimer Enable */ |