diff options
| author | Jack Rosenthal <jrosenth@chromium.org> | 2022-06-27 13:30:13 -0600 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-07-01 18:10:35 +0000 |
| commit | 0413bcfbc47cc728630724768e4754896aa15917 (patch) | |
| tree | 66582ec181710707fa2b553881d2527352f758f2 /board/dingdong | |
| parent | 5d062d6ea8d5aa4a39b7024c10b2cef22695989f (diff) | |
| download | chrome-ec-0413bcfbc47cc728630724768e4754896aa15917.tar.gz | |
board/dingdong/usb_pd_config.h: Format with clang-format
BUG=b:236386294
BRANCH=none
TEST=none
Change-Id: I969bc424ed8faf6ecc4a78535bd389e1509078e0
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3728204
Reviewed-by: Jeremy Bettis <jbettis@chromium.org>
Diffstat (limited to 'board/dingdong')
| -rw-r--r-- | board/dingdong/usb_pd_config.h | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/board/dingdong/usb_pd_config.h b/board/dingdong/usb_pd_config.h index 2f01c275a8..e783ff874c 100644 --- a/board/dingdong/usb_pd_config.h +++ b/board/dingdong/usb_pd_config.h @@ -49,7 +49,7 @@ static inline void spi_enable_clock(int port) #define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0 #define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0 -#define TIM_CCR_CS 1 +#define TIM_CCR_CS 1 #define EXTI_COMP_MASK(p) BIT(21) #define IRQ_COMP STM32_IRQ_COMP /* triggers packet detection on comparator falling edge */ @@ -88,9 +88,8 @@ static inline void pd_tx_enable(int port, int polarity) static inline void pd_tx_disable(int port, int polarity) { /* output low on SPI TX (PB4) to disable the FET */ - STM32_GPIO_MODER(GPIO_B) = (STM32_GPIO_MODER(GPIO_B) - & ~(3 << (2*4))) - | (1 << (2*4)); + STM32_GPIO_MODER(GPIO_B) = + (STM32_GPIO_MODER(GPIO_B) & ~(3 << (2 * 4))) | (1 << (2 * 4)); /* put the low level reference in Hi-Z */ gpio_set_level(GPIO_PD_CC1_TX_EN, 0); } @@ -101,8 +100,8 @@ static inline void pd_select_polarity(int port, int polarity) * use the right comparator : CC1 -> PA1 (COMP1 INP) * use VrefInt / 2 as INM (about 600mV) */ - STM32_COMP_CSR = (STM32_COMP_CSR & ~STM32_COMP_CMP1INSEL_MASK) - | STM32_COMP_CMP1EN | STM32_COMP_CMP1INSEL_VREF12; + STM32_COMP_CSR = (STM32_COMP_CSR & ~STM32_COMP_CMP1INSEL_MASK) | + STM32_COMP_CMP1EN | STM32_COMP_CMP1INSEL_VREF12; } /* Initialize pins used for TX and put them in Hi-Z */ @@ -111,7 +110,9 @@ static inline void pd_tx_init(void) gpio_config_module(MODULE_USB_PD, 1); } -static inline void pd_set_host_mode(int port, int enable) {} +static inline void pd_set_host_mode(int port, int enable) +{ +} static inline void pd_config_init(int port, uint8_t power_role) { |