diff options
author | Gwendal Grignou <gwendal@chromium.org> | 2019-03-11 15:57:52 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2019-03-26 04:42:55 -0700 |
commit | bb266fc26fc05d4ab22de6ad7bce5b477c9f9140 (patch) | |
tree | f6ada087f62246c3a9547e649ac8846b0ed6d5ab /board/dingdong | |
parent | 0bfc511527cf2aebfa163c63a1d028419ca0b0c3 (diff) | |
download | chrome-ec-bb266fc26fc05d4ab22de6ad7bce5b477c9f9140.tar.gz |
common: replace 1 << digits, with BIT(digits)
Requested for linux integration, use BIT instead of 1 <<
First step replace bit operation with operand containing only digits.
Fix an error in motion_lid try to set bit 31 of a signed integer.
BUG=None
BRANCH=None
TEST=compile
Change-Id: Ie843611f2f68e241f0f40d4067f7ade726951d29
Signed-off-by: Gwendal Grignou <gwendal@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1518659
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'board/dingdong')
-rw-r--r-- | board/dingdong/board.c | 4 | ||||
-rw-r--r-- | board/dingdong/usb_pd_config.h | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/board/dingdong/board.c b/board/dingdong/board.c index ae79cb5b6b..b03275555e 100644 --- a/board/dingdong/board.c +++ b/board/dingdong/board.c @@ -95,9 +95,9 @@ void hpd_event(enum gpio_signal signal) void board_config_pre_init(void) { /* enable SYSCFG clock */ - STM32_RCC_APB2ENR |= 1 << 0; + STM32_RCC_APB2ENR |= BIT(0); /* Remap USART DMA to match the USART driver */ - STM32_SYSCFG_CFGR1 |= (1 << 9) | (1 << 10);/* Remap USART1 RX/TX DMA */ + STM32_SYSCFG_CFGR1 |= BIT(9) | BIT(10);/* Remap USART1 RX/TX DMA */ } /* Initialize board. */ diff --git a/board/dingdong/usb_pd_config.h b/board/dingdong/usb_pd_config.h index 33e7225131..309c2200f9 100644 --- a/board/dingdong/usb_pd_config.h +++ b/board/dingdong/usb_pd_config.h @@ -50,7 +50,7 @@ static inline void spi_enable_clock(int port) #define TIM_TX_CCR_IDX(p) TIM_TX_CCR_C0 #define TIM_RX_CCR_IDX(p) TIM_RX_CCR_C0 #define TIM_CCR_CS 1 -#define EXTI_COMP_MASK(p) (1 << 21) +#define EXTI_COMP_MASK(p) BIT(21) #define IRQ_COMP STM32_IRQ_COMP /* triggers packet detection on comparator falling edge */ #define EXTI_XTSR STM32_EXTI_FTSR @@ -71,8 +71,8 @@ static inline void pd_set_pins_speed(int port) static inline void pd_tx_spi_reset(int port) { /* Reset SPI1 */ - STM32_RCC_APB2RSTR |= (1 << 12); - STM32_RCC_APB2RSTR &= ~(1 << 12); + STM32_RCC_APB2RSTR |= BIT(12); + STM32_RCC_APB2RSTR &= ~BIT(12); } /* Drive the CC line from the TX block */ |