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| author | Vincent Palatin <vpalatin@chromium.org> | 2012-02-15 18:16:04 +0000 |
|---|---|---|
| committer | Vincent Palatin <vpalatin@chromium.org> | 2012-02-15 18:24:04 +0000 |
| commit | ee9279c1a80288e2c10c8273af160ef1c9482db5 (patch) | |
| tree | 1fbacd3339b091bbc2b1afaa0135e52305a3431c /board/discovery | |
| parent | c160dae1d45ea1a02e17b5de75e75a396b160627 (diff) | |
| download | chrome-ec-ee9279c1a80288e2c10c8273af160ef1c9482db5.tar.gz | |
stm32l: set pin mux for USART1
When we are not running the ROM monitor first, we must set the pins used
for USART1 (PA9/PA10) as alternate function.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=None
TEST=Run firmware on the discovery board not from the monitor and see
the traces.
Change-Id: I32be3d5a88a3e71828d081d74503722331a649b8
Diffstat (limited to 'board/discovery')
| -rw-r--r-- | board/discovery/board.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/board/discovery/board.c b/board/discovery/board.c index e6a360dbbd..e516dc4278 100644 --- a/board/discovery/board.c +++ b/board/discovery/board.c @@ -27,11 +27,19 @@ void configure_board(void) */ STM32L_RCC_AHBENR |= 0x3f; +#if CONFIG_CONSOLE_UART == 1 + /* Select Alternate function for USART1 on pins PA9/PA10 */ + STM32L_GPIO_AFRH(A) = (STM32L_GPIO_AFRH(A) & ~0x00000FF0) | + (0x7 << 8) | (0x7 << 4); + STM32L_GPIO_MODER(A) = (STM32L_GPIO_MODER(A) & ~0x003C0000) | + 0x00280000; +#elif CONFIG_CONSOLE_UART == 3 /* Select Alternate function for USART3 on pins PB10/PB11 */ STM32L_GPIO_AFRH(B) = (STM32L_GPIO_AFRH(B) & ~0x0000FF00) | (0x7 << 12) | (0x7 << 8); STM32L_GPIO_MODER(B) = (STM32L_GPIO_MODER(B) & ~0x00F00000) | 0x00A00000; +#endif } /** |