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| author | Scott Chao <scott_chao@wistron.corp-partner.google.com> | 2020-09-18 14:59:28 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-09-21 19:17:34 +0000 |
| commit | 7b14150c0425080644bd96df846a4eb5c3159e01 (patch) | |
| tree | a535c8b0b1c7b5f1f8af0962b6509ee42f534e41 /board/eldrid/board.h | |
| parent | c6e2ac5ba87352505985c6f374c142fa6189b5ac (diff) | |
| download | chrome-ec-7b14150c0425080644bd96df846a4eb5c3159e01.tar.gz | |
eldrid: remove USB4 support
We don't support USB4 and bb retimer.
BUG=b:168862153
BRANCH=none
TEST=make -j BOARD=eldrid
TEST=make buildall
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: Ifc0b1b239812b1cf690691f4c90eb96f05e370a4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2417786
Reviewed-by: Keith Short <keithshort@chromium.org>
Diffstat (limited to 'board/eldrid/board.h')
| -rw-r--r-- | board/eldrid/board.h | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/board/eldrid/board.h b/board/eldrid/board.h index a127a8e272..eee3c864ce 100644 --- a/board/eldrid/board.h +++ b/board/eldrid/board.h @@ -93,13 +93,6 @@ #define PD_MAX_CURRENT_MA 3000 #define PD_MAX_VOLTAGE_MV 20000 -/* Enabling Thunderbolt-compatible mode */ -#define CONFIG_USB_PD_TBT_COMPAT_MODE - -/* Enabling USB4 mode */ -#define CONFIG_USB_PD_USB4 -#define USBC_PORT_C1_BB_RETIMER_I2C_ADDR 0x40 - /* Disabled PD extended message support to save flash space. */ #undef CONFIG_USB_PD_EXTENDED_MESSAGES @@ -122,6 +115,10 @@ #define CONFIG_CHARGER_SENSE_RESISTOR 10 #define CONFIG_CHARGER_SENSE_RESISTOR_AC 10 +/* Retimer */ +#undef CONFIG_USBC_RETIMER_INTEL_BB +#undef CONFIG_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG + /* * Macros for GPIO signals used in common code that don't match the * schematic names. Signal names in gpio.inc match the schematic and are @@ -158,7 +155,6 @@ #define I2C_PORT_SENSOR NPCX_I2C_PORT0_0 #define I2C_PORT_USB_C0 NPCX_I2C_PORT1_0 #define I2C_PORT_USB_C1 NPCX_I2C_PORT2_0 -#define I2C_PORT_USB_1_MIX NPCX_I2C_PORT3_0 #define I2C_PORT_POWER NPCX_I2C_PORT5_0 #define I2C_PORT_EEPROM NPCX_I2C_PORT7_0 |