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authorJack Rosenthal <jrosenth@chromium.org>2021-11-04 12:11:58 -0600
committerCommit Bot <commit-bot@chromium.org>2021-11-05 04:22:34 +0000
commit252457d4b21f46889eebad61d4c0a65331919cec (patch)
tree01856c4d31d710b20e85a74c8d7b5836e35c3b98 /board/endeavour
parent08f5a1e6fc2c9467230444ac9b582dcf4d9f0068 (diff)
downloadchrome-ec-252457d4b21f46889eebad61d4c0a65331919cec.tar.gz
In the interest of making long-term branch maintenance incur as little technical debt on us as possible, we should not maintain any files on the branch we are not actually using. This has the added effect of making it extremely clear when merging CLs from the main branch when changes have the possibility to affect us. The follow-on CL adds a convenience script to actually pull updates from the main branch and generate a CL for the update. BUG=b:204206272 BRANCH=ish TEST=make BOARD=arcada_ish && make BOARD=drallion_ish Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I17e4694c38219b5a0823e0a3e55a28d1348f4b18 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3262038 Reviewed-by: Jett Rink <jettrink@chromium.org> Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'board/endeavour')
-rw-r--r--board/endeavour/board.c388
-rw-r--r--board/endeavour/board.h152
-rw-r--r--board/endeavour/build.mk14
-rw-r--r--board/endeavour/ec.tasklist16
-rw-r--r--board/endeavour/gpio.inc93
-rw-r--r--board/endeavour/led.c211
-rw-r--r--board/endeavour/pse.c266
7 files changed, 0 insertions, 1140 deletions
diff --git a/board/endeavour/board.c b/board/endeavour/board.c
deleted file mode 100644
index f208da3819..0000000000
--- a/board/endeavour/board.c
+++ /dev/null
@@ -1,388 +0,0 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Endeavour board configuration */
-
-#include "adc.h"
-#include "battery.h"
-#include "bd99992gw.h"
-#include "board_config.h"
-#include "button.h"
-#include "chipset.h"
-#include "console.h"
-#include "cros_board_info.h"
-#include "driver/pmic_tps650x30.h"
-#include "driver/temp_sensor/tmp432.h"
-#include "espi.h"
-#include "extpower.h"
-#include "fan.h"
-#include "fan_chip.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "host_command.h"
-#include "i2c.h"
-#include "math_util.h"
-#include "pi3usb9281.h"
-#include "power.h"
-#include "power_button.h"
-#include "pwm.h"
-#include "pwm_chip.h"
-#include "spi.h"
-#include "switch.h"
-#include "system.h"
-#include "task.h"
-#include "temp_sensor.h"
-#include "timer.h"
-#include "uart.h"
-#include "util.h"
-
-#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
-
-static uint8_t board_version;
-static uint32_t oem;
-static uint32_t sku;
-
-#include "gpio_list.h"
-
-/* Hibernate wake configuration */
-const enum gpio_signal hibernate_wake_pins[] = {
- GPIO_POWER_BUTTON_L,
-};
-const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
-
-/* ADC channels */
-const struct adc_t adc_channels[] = {
- /* Vbus sensing (1/10 voltage divider). */
- [ADC_VBUS] = {"VBUS", NPCX_ADC_CH2, ADC_MAX_VOLT*10, ADC_READ_MAX+1, 0},
-};
-BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
-
-/* TODO: Verify fan control and mft */
-const struct fan_conf fan_conf_0 = {
- .flags = FAN_USE_RPM_MODE,
- .ch = MFT_CH_0, /* Use MFT id to control fan */
- .pgood_gpio = -1,
- .enable_gpio = GPIO_FAN_PWR_EN,
-};
-
-const struct fan_rpm fan_rpm_0 = {
- .rpm_min = 2500,
- .rpm_start = 2500,
- .rpm_max = 5400,
-};
-
-const struct fan_t fans[] = {
- [FAN_CH_0] = { .conf = &fan_conf_0, .rpm = &fan_rpm_0, },
-};
-BUILD_ASSERT(ARRAY_SIZE(fans) == FAN_CH_COUNT);
-
-const struct mft_t mft_channels[] = {
- [MFT_CH_0] = {NPCX_MFT_MODULE_2, TCKC_LFCLK, PWM_CH_FAN},
-};
-BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT);
-
-const struct i2c_port_t i2c_ports[] = {
- {"pse", I2C_PORT_PSE, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA},
- {"eeprom", I2C_PORT_EEPROM, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA},
- {"pmic", I2C_PORT_PMIC, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA},
- {"thermal", I2C_PORT_THERMAL, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA},
-};
-const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
-
-const int usb_port_enable[USB_PORT_COUNT] = {
- GPIO_USB_C0_5V_EN,
- GPIO_USB_FP0_5V_EN,
- GPIO_USB_FP1_5V_EN,
- GPIO_USB_FP3_5V_EN,
-};
-
-/*
- * TMP431 has one local and one remote sensor.
- *
- * Temperature sensors data; must be in same order as enum temp_sensor_id.
- * Sensor index and name must match those present in coreboot:
- * src/mainboard/google/${board}/acpi/dptf.asl
- */
-const struct temp_sensor_t temp_sensors[] = {
- {"TMP431_Internal", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val,
- TMP432_IDX_LOCAL},
- {"TMP431_Sensor_1", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val,
- TMP432_IDX_REMOTE1},
-};
-BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT);
-
-/*
- * Thermal limits for each temp sensor. All temps are in degrees K. Must be in
- * same order as enum temp_sensor_id. To always ignore any temp, use 0.
- */
-struct ec_thermal_config thermal_params[] = {
- /* {Twarn, Thigh, Thalt}, <on>
- * {Twarn, Thigh, X }, <off>
- * fan_off, fan_max
- */
- {{0, C_TO_K(81), C_TO_K(82)}, {0, C_TO_K(77), 0},
- C_TO_K(19), C_TO_K(74)}, /* TMP431_Internal */
- {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* TMP431_Sensor_1 */
-};
-BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT);
-
-/* Initialize PMIC */
-#define I2C_PMIC_READ(reg, data) \
- i2c_read8(I2C_PORT_PMIC, TPS650X30_I2C_ADDR1_FLAGS, (reg), (data))
-
-#define I2C_PMIC_WRITE(reg, data) \
- i2c_write8(I2C_PORT_PMIC, TPS650X30_I2C_ADDR1_FLAGS, (reg), (data))
-
-static void board_pmic_init(void)
-{
- int err;
- int error_count = 0;
- static uint8_t pmic_initialized = 0;
-
- if (pmic_initialized)
- return;
-
- /* Read vendor ID */
- while (1) {
- int data;
- err = I2C_PMIC_READ(TPS650X30_REG_VENDORID, &data);
- if (!err && data == TPS650X30_VENDOR_ID)
- break;
- else if (error_count > 5)
- goto pmic_error;
- error_count++;
- }
-
- /*
- * VCCIOCNT register setting
- * [6] : CSDECAYEN
- * otherbits: default
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_VCCIOCNT, 0x4A);
- if (err)
- goto pmic_error;
-
- /*
- * VRMODECTRL:
- * [4] : VCCIOLPM clear
- * otherbits: default
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_VRMODECTRL, 0x2F);
- if (err)
- goto pmic_error;
-
- /*
- * PGMASK1 : Exclude VCCIO from Power Good Tree
- * [7] : MVCCIOPG clear
- * otherbits: default
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_PGMASK1, 0x80);
- if (err)
- goto pmic_error;
-
- /*
- * PWFAULT_MASK1 Register settings
- * [7] : 1b V4 Power Fault Masked
- * [4] : 1b V7 Power Fault Masked
- * [2] : 1b V9 Power Fault Masked
- * [0] : 1b V13 Power Fault Masked
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_PWFAULT_MASK1, 0x95);
- if (err)
- goto pmic_error;
-
- /*
- * Discharge control 4 register configuration
- * [7:6] : 00b Reserved
- * [5:4] : 01b V3.3S discharge resistance (V6S), 100 Ohm
- * [3:2] : 01b V18S discharge resistance (V8S), 100 Ohm
- * [1:0] : 01b V100S discharge resistance (V11S), 100 Ohm
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_DISCHCNT4, 0x15);
- if (err)
- goto pmic_error;
-
- /*
- * Discharge control 3 register configuration
- * [7:6] : 01b V1.8U_2.5U discharge resistance (V9), 100 Ohm
- * [5:4] : 01b V1.2U discharge resistance (V10), 100 Ohm
- * [3:2] : 01b V100A discharge resistance (V11), 100 Ohm
- * [1:0] : 01b V085A discharge resistance (V12), 100 Ohm
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_DISCHCNT3, 0x55);
- if (err)
- goto pmic_error;
-
- /*
- * Discharge control 2 register configuration
- * [7:6] : 01b V5ADS3 discharge resistance (V5), 100 Ohm
- * [5:4] : 01b V33A_DSW discharge resistance (V6), 100 Ohm
- * [3:2] : 01b V33PCH discharge resistance (V7), 100 Ohm
- * [1:0] : 01b V18A discharge resistance (V8), 100 Ohm
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_DISCHCNT2, 0x55);
- if (err)
- goto pmic_error;
-
- /*
- * Discharge control 1 register configuration
- * [7:2] : 00b Reserved
- * [1:0] : 01b VCCIO discharge resistance (V4), 100 Ohm
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_DISCHCNT1, 0x01);
- if (err)
- goto pmic_error;
-
- /*
- * Increase Voltage
- * [7:0] : 0x2a default
- * [5:4] : 10b default
- * [5:4] : 01b 5.1V (0x1a)
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_V5ADS3CNT, 0x1a);
- if (err)
- goto pmic_error;
-
- /*
- * PBCONFIG Register configuration
- * [7] : 1b Power button debounce, 0ms (no debounce)
- * [6] : 0b Power button reset timer logic, no action (default)
- * [5:0] : 011111b Force an Emergency reset time, 31s (default)
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_PBCONFIG, 0x9F);
- if (err)
- goto pmic_error;
-
- /*
- * V3.3A_DSW (VR3) control. Default: 0x2A.
- * [7:6] : 00b Disabled
- * [5:4] : 00b Vnom + 3%. (default: 10b 0%)
- */
- err = I2C_PMIC_WRITE(TPS650X30_REG_V33ADSWCNT, 0x0A);
- if (err)
- goto pmic_error;
-
- CPRINTS("PMIC init done");
- pmic_initialized = 1;
- return;
-
-pmic_error:
- CPRINTS("PMIC init failed");
-}
-
-void chipset_pre_init_callback(void)
-{
- board_pmic_init();
-}
-
-/**
- * Notify PCH of the AC presence.
- */
-static void board_extpower(void)
-{
- gpio_set_level(GPIO_PCH_ACPRESENT, extpower_is_present());
-}
-DECLARE_HOOK(HOOK_AC_CHANGE, board_extpower, HOOK_PRIO_DEFAULT);
-
-int64_t get_time_dsw_pwrok(void)
-{
- /* DSW_PWROK is turned on before EC was powered. */
- return -20 * MSEC;
-}
-
-const struct pwm_t pwm_channels[] = {
- [PWM_CH_LED_RED] = { 3, PWM_CONFIG_DSLEEP, 100 },
- [PWM_CH_LED_WHITE] = { 5, PWM_CONFIG_DSLEEP, 100 },
- [PWM_CH_FAN] = {4, PWM_CONFIG_OPEN_DRAIN, 25000},
-};
-BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
-
-struct fan_step {
- int on;
- int off;
- int rpm;
-};
-
-/* Note: Do not make the fan on/off point equal to 0 or 100 */
-static const struct fan_step fan_table0[] = {
- {.on = 0, .off = 2, .rpm = 0},
- {.on = 11, .off = 2, .rpm = 2500},
- {.on = 38, .off = 29, .rpm = 3200},
- {.on = 65, .off = 36, .rpm = 3500},
- {.on = 76, .off = 64, .rpm = 3900},
- {.on = 84, .off = 75, .rpm = 4500},
- {.on = 91, .off = 82, .rpm = 5100},
- {.on = 98, .off = 89, .rpm = 5400},
-};
-/* All fan tables must have the same number of levels */
-#define NUM_FAN_LEVELS ARRAY_SIZE(fan_table0)
-
-static const struct fan_step *fan_table = fan_table0;
-
-
-static void cbi_init(void)
-{
- uint32_t val;
- if (cbi_get_board_version(&val) == EC_SUCCESS && val <= UINT8_MAX)
- board_version = val;
- CPRINTS("Board Version: 0x%02x", board_version);
-
- if (cbi_get_oem_id(&val) == EC_SUCCESS && val < OEM_COUNT)
- oem = val;
- CPRINTS("OEM: %d", oem);
-
- if (cbi_get_sku_id(&val) == EC_SUCCESS)
- sku = val;
- CPRINTS("SKU: 0x%08x", sku);
-}
-DECLARE_HOOK(HOOK_INIT, cbi_init, HOOK_PRIO_INIT_I2C + 1);
-
-static void board_init(void)
-{
- board_extpower();
-}
-DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
-
-int fan_percent_to_rpm(int fan, int pct)
-{
- static int current_level;
- static int previous_pct;
- int i;
-
- /*
- * Compare the pct and previous pct, we have the three paths :
- * 1. decreasing path. (check the off point)
- * 2. increasing path. (check the on point)
- * 3. invariant path. (return the current RPM)
- */
- if (pct < previous_pct) {
- for (i = current_level; i >= 0; i--) {
- if (pct <= fan_table[i].off)
- current_level = i - 1;
- else
- break;
- }
- } else if (pct > previous_pct) {
- for (i = current_level + 1; i < NUM_FAN_LEVELS; i++) {
- if (pct >= fan_table[i].on)
- current_level = i;
- else
- break;
- }
- }
-
- if (current_level < 0)
- current_level = 0;
-
- previous_pct = pct;
-
- if (fan_table[current_level].rpm !=
- fan_get_rpm_target(FAN_CH(fan)))
- cprints(CC_THERMAL, "Setting fan RPM to %d",
- fan_table[current_level].rpm);
-
- return fan_table[current_level].rpm;
-}
diff --git a/board/endeavour/board.h b/board/endeavour/board.h
deleted file mode 100644
index 36afe69d6c..0000000000
--- a/board/endeavour/board.h
+++ /dev/null
@@ -1,152 +0,0 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Endeavour board configuration */
-
-#ifndef __CROS_EC_BOARD_H
-#define __CROS_EC_BOARD_H
-
-/*
- * Allow dangerous commands.
- * TODO: Remove this config before production.
- */
-#undef CONFIG_SYSTEM_UNLOCKED
-#define CONFIG_USB_PD_COMM_LOCKED
-
-/* EC */
-#define CONFIG_ADC
-#define CONFIG_BOARD_VERSION_CBI
-#define CONFIG_BOARD_HAS_RTC_RESET
-#define CONFIG_CRC8
-#define CONFIG_CBI_EEPROM
-#define CONFIG_DEDICATED_RECOVERY_BUTTON
-#define CONFIG_EMULATED_SYSRQ
-#define CONFIG_LED_COMMON
-#define CONFIG_MKBP_INPUT_DEVICES
-#define CONFIG_MKBP_USE_HOST_EVENT
-#define CONFIG_DPTF
-#define CONFIG_FLASH_SIZE_BYTES 0x80000
-#define CONFIG_FPU
-#define CONFIG_I2C
-#define CONFIG_I2C_CONTROLLER
-#undef CONFIG_LID_SWITCH
-#define CONFIG_POWER_BUTTON_IGNORE_LID
-#define CONFIG_PWM
-#define CONFIG_LTO
-#define CONFIG_CHIP_PANIC_BACKUP
-#define CONFIG_SPI_FLASH_REGS
-#define CONFIG_SPI_FLASH_W25X40
-#define CONFIG_WATCHDOG_HELP
-#define CONFIG_WIRELESS
-#define CONFIG_WIRELESS_SUSPEND \
- (EC_WIRELESS_SWITCH_WLAN | EC_WIRELESS_SWITCH_WLAN_POWER)
-#define WIRELESS_GPIO_WLAN GPIO_WLAN_OFF_L
-#define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_DX_WLAN
-#define CONFIG_FANS 1
-#define CONFIG_FAN_RPM_CUSTOM
-#define CONFIG_THROTTLE_AP
-#define CONFIG_CHIPSET_CAN_THROTTLE
-#define CONFIG_PWM
-
-/* EC console commands */
-#define CONFIG_CMD_BUTTON
-
-/* SOC */
-#define CONFIG_CHIPSET_SKYLAKE
-#define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET
-#define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK
-#define CONFIG_CHIPSET_RESET_HOOK
-#define CONFIG_HOSTCMD_ESPI
-#define CONFIG_HOSTCMD_ESPI_VW_SLP_S3
-#define CONFIG_HOSTCMD_ESPI_VW_SLP_S4
-
-#define CONFIG_EXTPOWER_GPIO
-#undef CONFIG_EXTPOWER_DEBOUNCE_MS
-#define CONFIG_EXTPOWER_DEBOUNCE_MS 1000
-#define CONFIG_POWER_BUTTON
-#define CONFIG_POWER_BUTTON_X86
-#define CONFIG_POWER_BUTTON_INIT_IDLE
-#define CONFIG_POWER_COMMON
-#define CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD 30
-#define CONFIG_DELAY_DSW_PWROK_TO_PWRBTN
-
-/* Sensor */
-#define CONFIG_TEMP_SENSOR
-#define CONFIG_TEMP_SENSOR_TMP432
-
-/* USB-A config */
-#define CONFIG_USB_PORT_POWER_DUMB
-#define USB_PORT_COUNT 4
-
-/* Optional feature to configure npcx chip */
-#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART */
-#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 as JTAG */
-#define NPCX_TACH_SEL2 1 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */
-
-/* I2C ports */
-#define I2C_PORT_PSE NPCX_I2C_PORT0_0
-#define I2C_PORT_EEPROM NPCX_I2C_PORT0_1
-#define I2C_PORT_PMIC NPCX_I2C_PORT2
-#define I2C_PORT_THERMAL NPCX_I2C_PORT3
-
-/* I2C addresses */
-#define I2C_ADDR_EEPROM_FLAGS 0x50
-
-#define CONFIG_VBOOT_HASH
-#define CONFIG_VSTORE
-#define CONFIG_VSTORE_SLOT_COUNT 1
-
-#ifndef __ASSEMBLER__
-
-#include "gpio_signal.h"
-#include "registers.h"
-
-enum charge_port {
- CHARGE_PORT_BARRELJACK,
-};
-
-enum temp_sensor_id {
- TEMP_SENSOR_CHARGER, /* BD99992GW SYSTHERM1 */
- TEMP_SENSOR_DRAM, /* BD99992GW SYSTHERM2 */
- TEMP_SENSOR_COUNT
-};
-
-enum adc_channel {
- ADC_VBUS,
- ADC_CH_COUNT
-};
-
-enum pwm_channel {
- PWM_CH_LED_RED,
- PWM_CH_LED_WHITE,
- PWM_CH_FAN,
- /* Number of PWM channels */
- PWM_CH_COUNT
-};
-
-enum fan_channel {
- FAN_CH_0,
- /* Number of FAN channels */
- FAN_CH_COUNT
-};
-
-enum mft_channel {
- MFT_CH_0,
- /* Number of MFT channels */
- MFT_CH_COUNT
-};
-
-enum OEM_ID {
- OEM_ENDEAVOUR = 9,
- /* Number of OEM IDs */
- OEM_COUNT
-};
-
-/* Board specific handlers */
-void show_critical_error(void);
-
-#endif /* !__ASSEMBLER__ */
-
-#endif /* __CROS_EC_BOARD_H */
diff --git a/board/endeavour/build.mk b/board/endeavour/build.mk
deleted file mode 100644
index 20f3f4d02c..0000000000
--- a/board/endeavour/build.mk
+++ /dev/null
@@ -1,14 +0,0 @@
-# -*- makefile -*-
-# Copyright 2019 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-#
-# Board specific files build
-#
-
-CHIP:=npcx
-CHIP_VARIANT:=npcx5m6g
-
-board-y=board.o
-board-y+=led.o
-board-y+=pse.o
diff --git a/board/endeavour/ec.tasklist b/board/endeavour/ec.tasklist
deleted file mode 100644
index ef58c6267a..0000000000
--- a/board/endeavour/ec.tasklist
+++ /dev/null
@@ -1,16 +0,0 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * See CONFIG_TASK_LIST in config.h for details.
- */
-
-#define CONFIG_TASK_LIST \
- TASK_ALWAYS(HOOKS, hook_task, NULL, 2048) \
- /* Larger stack for RW verification (i.e. sha256, rsa) */ \
- TASK_NOTEST(CHIPSET, chipset_task, NULL, TASK_STACK_SIZE) \
- TASK_ALWAYS(HOSTCMD, host_command_task, NULL, 2048) \
- TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
- TASK_ALWAYS(POWERBTN, power_button_task, NULL, LARGER_TASK_STACK_SIZE)
diff --git a/board/endeavour/gpio.inc b/board/endeavour/gpio.inc
deleted file mode 100644
index 85904aab0c..0000000000
--- a/board/endeavour/gpio.inc
+++ /dev/null
@@ -1,93 +0,0 @@
-/* -*- mode:c -*-
- *
- * Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Declare symbolic names for all the GPIOs that we care about.
- * Note: Those with interrupt handlers must be declared first. */
-
-GPIO_INT(AC_PRESENT, PIN(C, 1), GPIO_INT_BOTH, extpower_interrupt)
-GPIO_INT(POWER_BUTTON_L, PIN(0, 4), GPIO_INT_BOTH | GPIO_PULL_UP, power_button_interrupt) /* MECH_PWR_BTN_ODL */
-
-GPIO_INT(PCH_SLP_S0_L, PIN(7, 5), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(PCH_SLP_S3_L, PIN(7, 3), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(PCH_SLP_S4_L, PIN(8, 6), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(PCH_SLP_SUS_L, PIN(6, 2), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(RSMRST_L_PGOOD, PIN(B, 0), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(PMIC_DPWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt)
-GPIO_INT(WP_L, PIN(9, 3), GPIO_INT_BOTH, switch_interrupt)
-GPIO_INT(RECOVERY_L, PIN(8, 2), GPIO_INT_BOTH, button_interrupt) /* Recovery button */
-
-/* TODO(jnchase): configure as interrupt when code is ready / if needed*/
-GPIO(POE_LTC_PGOOD, PIN(C, 5), GPIO_INPUT) /* PoE power good */
-GPIO(PSE_PWM_INT, PIN(3, 7), GPIO_INPUT) /* PoE LTC interrupt */
-GPIO(V3P3A_I350_PG, PIN(4, 4), GPIO_INPUT) /* Disconnected */
-GPIO(USB_C0_VBUS_DET_L, PIN(9, 7), GPIO_INPUT) /* USB-C VBUS */
-GPIO(USB_C0_POL_L, PIN(3, 3), GPIO_INPUT | GPIO_SEL_1P8V) /* USB-C Polarity */
-
-GPIO(PCH_RTCRST, PIN(E, 7), GPIO_OUT_LOW) /* RTCRST# to SOC */
-GPIO(WLAN_OFF_L, PIN(7, 2), GPIO_OUT_LOW) /* Disable WLAN */
-GPIO(PP3300_DX_WLAN, PIN(A, 7), GPIO_OUT_LOW) /* Enable WLAN 3.3V Power */
-GPIO(CPU_PROCHOT, PIN(8, 1), GPIO_OUT_HIGH) /* PROCHOT# to SOC */
-GPIO(PCH_ACPRESENT, PIN(5, 0), GPIO_ODR_LOW) /* ACOK to SOC */
-GPIO(PCH_WAKE_L, PIN(A, 3), GPIO_ODR_HIGH) /* Wake SOC */
-GPIO(PCH_RSMRST_L, PIN(7, 0), GPIO_OUT_LOW) /* RSMRST# to SOC */
-GPIO(PCH_PWRBTN_L, PIN(7, 4), GPIO_ODR_HIGH) /* Power Button to SOC */
-GPIO(EC_PLATFORM_RST, PIN(4, 5), GPIO_OUT_LOW) /* EC Reset to LDO_EN */
-GPIO(SYS_RESET_L, PIN(6, 1), GPIO_ODR_HIGH) /* Cold Reset to SOC */
-GPIO(PMIC_SLP_SUS_L, PIN(8, 5), GPIO_OUT_LOW) /* SLP_SUS# to PMIC */
-GPIO(CCD_MODE_ODL, PIN(6, 3), GPIO_INPUT) /* Case Closed Debug Mode */
-GPIO(EC_HAVEN_RESET_ODL, PIN(0, 2), GPIO_ODR_HIGH) /* H1 Reset */
-GPIO(ENTERING_RW, PIN(7, 6), GPIO_OUTPUT) /* EC Entering RW */
-GPIO(PMIC_INT_L, PIN(6, 0), GPIO_INPUT) /* PMIC interrupt */
-GPIO(EC_RST_LTC4291_L, PIN(9, 4), GPIO_OUT_HIGH) /* PSE controller reset */
-
-GPIO(POWER_RATE, PIN(7, 1), GPIO_INPUT) /* High: i3/5/7. Low: Celeron */
-GPIO(PP3300_USB_PD_EN, PIN(6, 7), GPIO_OUT_HIGH) /* Initialize PP3300_USB_PD_EN as output high */
-
-GPIO(LAN_PWR_EN, PIN(8, 3), GPIO_OUT_HIGH) /* Ethernet power enabled */
-
-/* I2C pins - these will be reconfigured for alternate function below */
-GPIO(I2C0_0_SCL, PIN(B, 5), GPIO_INPUT) /* EC_I2C_LTC_SCL */
-GPIO(I2C0_0_SDA, PIN(B, 4), GPIO_INPUT) /* EC_I2C_LTC_SDA */
-GPIO(I2C0_1_SCL, PIN(B, 3), GPIO_INPUT) /* EC_I2C_EEPROM_SCL */
-GPIO(I2C0_1_SDA, PIN(B, 2), GPIO_INPUT) /* EC_I2C_EEPROM_SDA */
-GPIO(I2C1_SCL, PIN(9, 0), GPIO_INPUT) /* TP184 */
-GPIO(I2C1_SDA, PIN(8, 7), GPIO_INPUT) /* TP185 */
-GPIO(I2C2_SCL, PIN(9, 2), GPIO_INPUT) /* EC_ROP_I2C_CLK */
-GPIO(I2C2_SDA, PIN(9, 1), GPIO_INPUT) /* EC_ROP_I2C_SDA */
-GPIO(I2C3_SCL, PIN(D, 1), GPIO_INPUT) /* EC_THEM_CLK */
-GPIO(I2C3_SDA, PIN(D, 0), GPIO_INPUT) /* EC_THEM_SDA */
-
-/* 5V enables: INPUT=1.5A, OUT_LOW=OFF, OUT_HIGH=3A */
-GPIO(USB_C0_5V_EN, PIN(4, 2), GPIO_OUT_LOW | GPIO_PULL_UP) /* C0 5V Enable */
-GPIO(USB_C0_VBUS_ILIM, PIN(3, 5), GPIO_OUT_HIGH)
-GPIO(FAN_PWR_EN, PIN(9, 5), GPIO_OUT_HIGH) /* Fan power */
-GPIO(PI3_BC12_DET_L, PIN(D, 3), GPIO_INPUT) /* USB-C */
-GPIO(USB_FP3_CHARGE_EN_L, PIN(C, 6), GPIO_OUT_LOW) /* USB-C */
-GPIO(USB_FP0_5V_EN, PIN(0, 0), GPIO_OUT_LOW) /* Front port 1 */
-GPIO(USB_FP1_5V_EN, PIN(B, 1), GPIO_OUT_LOW) /* Front port 2 */
-GPIO(USB_FP3_5V_EN, PIN(A, 1), GPIO_OUT_LOW) /* Front port 3 */
-GPIO(USB_FP_CHARGE_EN_L, PIN(A, 5), GPIO_OUT_LOW) /* USB-A */
-GPIO(PP3300_TPU_EN, PIN(0, 1), GPIO_OUT_HIGH) /* TPU 3.3V enable */
-
-/* Not connected */
-GPIO(USB_C0_CHARGE_L, PIN(C, 0), GPIO_OUT_LOW) /* C0 Charge enable */
-GPIO(AC_JACK_CHARGE_L, PIN(C, 3), GPIO_OUT_LOW) /* AC jack charge enable */
-GPIO(USB_C0_PD_RST_ODL, PIN(0, 3), GPIO_OUT_LOW) /* C0 PD Reset */
-GPIO(USB_C0_TCPC_PWR, PIN(8, 4), GPIO_OUT_LOW) /* Enable C0 TCPC Power */
-GPIO(TYPE_C_65W, PIN(3, 4), GPIO_OUTPUT | GPIO_PULL_DOWN)
-
-/* Alternate functions GPIO definitions */
-ALTERNATE(PIN_MASK(6, 0x30), 1, MODULE_UART, 0) /* GPIO64-65 */ /* UART from EC to Servo */
-ALTERNATE(PIN_MASK(9, 0x06), 1, MODULE_I2C, 0) /* GPIO91-92 */ /* EC_I2C2_PMIC_3V3_SDA/SCL */
-ALTERNATE(PIN_MASK(A, 0x40), 1, MODULE_PWM, 0) /* GPIOA6 */ /* TACH2 */
-ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* GPIOB4-B5 */ /* EC_I2C0_0_LTC_SDA/SCL */
-ALTERNATE(PIN_MASK(B, 0x40), 1, MODULE_PWM, 0) /* GPIOB6 */ /* EC_FAN_PWM */
-ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, 0) /* GPOPB2-B3 */ /* EC_I2C0_1_EEPROM_SDA/SCL */
-ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* GPIOD0-D1 */ /* EC_I2C3_SENSOR_1V8_SDA/SCL */
-/* Alternate functions for LED PWM */
-ALTERNATE(PIN_MASK(8, 0x01), 1, MODULE_PWM, 0) /* GPIO80 PWM3 Red*/
-ALTERNATE(PIN_MASK(B, 0x80), 1, MODULE_PWM, 0) /* GPOB7 PWM5 Green*/
diff --git a/board/endeavour/led.c b/board/endeavour/led.c
deleted file mode 100644
index b75de503e5..0000000000
--- a/board/endeavour/led.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- *
- * Power and battery LED control for Endeavour
- */
-
-#include "chipset.h"
-#include "console.h"
-#include "ec_commands.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "led_common.h"
-#include "pwm.h"
-#include "timer.h"
-#include "util.h"
-
-const enum ec_led_id supported_led_ids[] = {EC_LED_ID_POWER_LED};
-const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
-
-enum led_color {
- LED_OFF = 0,
- LED_RED,
- LED_WHITE,
-
- /* Number of colors, not a color itself */
- LED_COLOR_COUNT
-};
-
-static int set_color_power(enum led_color color, int duty)
-{
- int white = 0;
- int red = 0;
-
- if (duty < 0 || 100 < duty)
- return EC_ERROR_UNKNOWN;
-
- switch (color) {
- case LED_OFF:
- break;
- case LED_WHITE:
- white = 1;
- break;
- case LED_RED:
- red = 1;
- break;
- default:
- return EC_ERROR_UNKNOWN;
- }
-
- if (red)
- pwm_set_duty(PWM_CH_LED_RED, duty);
- else
- pwm_set_duty(PWM_CH_LED_RED, 0);
-
- if (white)
- pwm_set_duty(PWM_CH_LED_WHITE, duty);
- else
- pwm_set_duty(PWM_CH_LED_WHITE, 0);
-
- return EC_SUCCESS;
-}
-
-static int set_color(enum ec_led_id id, enum led_color color, int duty)
-{
- switch (id) {
- case EC_LED_ID_POWER_LED:
- return set_color_power(color, duty);
- default:
- return EC_ERROR_UNKNOWN;
- }
-}
-
-#define LED_PULSE_US (2 * SECOND)
-/* 40 msec for nice and smooth transition. */
-#define LED_PULSE_TICK_US (40 * MSEC)
-
-/* When pulsing is enabled, brightness is incremented by <duty_inc> every
- * <interval> usec from 0 to 100% in LED_PULSE_US usec. Then it's decremented
- * likewise in LED_PULSE_US usec. */
-static struct {
- uint32_t interval;
- int duty_inc;
- enum led_color color;
- int duty;
-} led_pulse;
-
-#define LED_PULSE_TICK(interval, color) \
- config_tick((interval), 100 / (LED_PULSE_US / (interval)), (color))
-
-static void config_tick(uint32_t interval, int duty_inc, enum led_color color)
-{
- led_pulse.interval = interval;
- led_pulse.duty_inc = duty_inc;
- led_pulse.color = color;
- led_pulse.duty = 0;
-}
-
-static void pulse_power_led(enum led_color color)
-{
- set_color(EC_LED_ID_POWER_LED, color, led_pulse.duty);
- if (led_pulse.duty + led_pulse.duty_inc > 100)
- led_pulse.duty_inc = led_pulse.duty_inc * -1;
- else if (led_pulse.duty + led_pulse.duty_inc < 0)
- led_pulse.duty_inc = led_pulse.duty_inc * -1;
- led_pulse.duty += led_pulse.duty_inc;
-}
-
-static void led_tick(void);
-DECLARE_DEFERRED(led_tick);
-static void led_tick(void)
-{
- uint32_t elapsed;
- uint32_t next = 0;
- uint32_t start = get_time().le.lo;
-
- if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED))
- pulse_power_led(led_pulse.color);
- elapsed = get_time().le.lo - start;
- next = led_pulse.interval > elapsed ? led_pulse.interval - elapsed : 0;
- hook_call_deferred(&led_tick_data, next);
-}
-
-static void led_suspend(void)
-{
- LED_PULSE_TICK(LED_PULSE_TICK_US, LED_WHITE);
- led_tick();
-}
-DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, led_suspend, HOOK_PRIO_DEFAULT);
-
-static void led_shutdown(void)
-{
- hook_call_deferred(&led_tick_data, -1);
- if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED))
- set_color(EC_LED_ID_POWER_LED, LED_OFF, 0);
-}
-DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, led_shutdown, HOOK_PRIO_DEFAULT);
-
-static void led_resume(void)
-{
- /* Assume there is no race condition with led_tick, which also
- * runs in hook_task. */
- hook_call_deferred(&led_tick_data, -1);
- if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED))
- set_color(EC_LED_ID_POWER_LED, LED_WHITE, 100);
-}
-DECLARE_HOOK(HOOK_CHIPSET_RESUME, led_resume, HOOK_PRIO_DEFAULT);
-
-static void led_init(void)
-{
- pwm_enable(PWM_CH_LED_RED, 1);
- pwm_enable(PWM_CH_LED_WHITE, 1);
-
- if (chipset_in_state(CHIPSET_STATE_ON))
- led_resume();
- else if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND))
- led_suspend();
- else if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
- led_shutdown();
-}
-DECLARE_HOOK(HOOK_INIT, led_init, HOOK_PRIO_DEFAULT);
-
-void show_critical_error(void)
-{
- hook_call_deferred(&led_tick_data, -1);
- if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED))
- set_color(EC_LED_ID_POWER_LED, LED_RED, 100);
-}
-
-static int command_led(int argc, char **argv)
-{
- enum ec_led_id id = EC_LED_ID_POWER_LED;
-
- if (argc < 2)
- return EC_ERROR_PARAM_COUNT;
-
- if (!strcasecmp(argv[1], "debug")) {
- led_auto_control(id, !led_auto_control_is_enabled(id));
- ccprintf("o%s\n", led_auto_control_is_enabled(id) ? "ff" : "n");
- } else if (!strcasecmp(argv[1], "off")) {
- set_color(id, LED_OFF, 0);
- } else if (!strcasecmp(argv[1], "red")) {
- set_color(id, LED_RED, 100);
- } else if (!strcasecmp(argv[1], "white")) {
- set_color(id, LED_WHITE, 100);
- } else if (!strcasecmp(argv[1], "crit")) {
- show_critical_error();
- } else {
- return EC_ERROR_PARAM1;
- }
- return EC_SUCCESS;
-}
-DECLARE_CONSOLE_COMMAND(led, command_led,
- "[debug|red|white|off|crit]",
- "Turn on/off LED.");
-
-void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
-{
- brightness_range[EC_LED_COLOR_RED] = 100;
- brightness_range[EC_LED_COLOR_WHITE] = 100;
-}
-
-int led_set_brightness(enum ec_led_id id, const uint8_t *brightness)
-{
- if (brightness[EC_LED_COLOR_RED])
- return set_color(id, LED_RED, brightness[EC_LED_COLOR_RED]);
- else if (brightness[EC_LED_COLOR_WHITE])
- return set_color(id, LED_WHITE, brightness[EC_LED_COLOR_WHITE]);
- else
- return set_color(id, LED_OFF, 0);
-}
diff --git a/board/endeavour/pse.c b/board/endeavour/pse.c
deleted file mode 100644
index 671288ccf5..0000000000
--- a/board/endeavour/pse.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/* Copyright 2020 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * The LTC4291 is a power over ethernet (PoE) power sourcing equipment (PSE)
- * controller.
- */
-
-#include "common.h"
-#include "console.h"
-#include "ec_commands.h"
-#include "hooks.h"
-#include "host_command.h"
-#include "i2c.h"
-#include "string.h"
-#include "timer.h"
-#include "util.h"
-
-#define LTC4291_I2C_ADDR 0x2C
-
-#define LTC4291_REG_SUPEVN_COR 0x0B
-#define LTC4291_REG_STATPWR 0x10
-#define LTC4291_REG_STATPIN 0x11
-#define LTC4291_REG_OPMD 0x12
-#define LTC4291_REG_DISENA 0x13
-#define LTC4291_REG_DETENA 0x14
-#define LTC4291_REG_DETPB 0x18
-#define LTC4291_REG_PWRPB 0x19
-#define LTC4291_REG_RSTPB 0x1A
-#define LTC4291_REG_ID 0x1B
-#define LTC4291_REG_DEVID 0x43
-#define LTC4291_REG_HPMD1 0x46
-#define LTC4291_REG_HPMD2 0x4B
-#define LTC4291_REG_HPMD3 0x50
-#define LTC4291_REG_HPMD4 0x55
-#define LTC4291_REG_LPWRPB 0x6E
-
-#define LTC4291_FLD_STATPIN_AUTO BIT(0)
-#define LTC4291_FLD_RSTPB_RSTALL BIT(4)
-
-#define LTC4291_STATPWR_ON_PORT(port) (0x01 << (port))
-#define LTC4291_DETENA_EN_PORT(port) (0x11 << (port))
-#define LTC4291_DETPB_EN_PORT(port) (0x11 << (port))
-#define LTC4291_PWRPB_OFF_PORT(port) (0x10 << (port))
-
-#define LTC4291_OPMD_AUTO 0xFF
-#define LTC4291_DISENA_ALL 0x0F
-#define LTC4291_DETENA_ALL 0xFF
-#define LTC4291_ID 0x64
-#define LTC4291_DEVID 0x38
-#define LTC4291_HPMD_MIN 0x00
-#define LTC4291_HPMD_MAX 0xA8
-
-#define LTC4291_PORT_MAX 4
-
-#define LTC4291_RESET_DELAY_US (20 * MSEC)
-
-#define I2C_PSE_READ(reg, data) \
- i2c_read8(I2C_PORT_PSE, LTC4291_I2C_ADDR, LTC4291_REG_##reg, (data))
-
-#define I2C_PSE_WRITE(reg, data) \
- i2c_write8(I2C_PORT_PSE, LTC4291_I2C_ADDR, LTC4291_REG_##reg, (data))
-
-#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
-
-static int pse_write_hpmd(int port, int val)
-{
- switch (port) {
- case 0:
- return I2C_PSE_WRITE(HPMD1, val);
- case 1:
- return I2C_PSE_WRITE(HPMD2, val);
- case 2:
- return I2C_PSE_WRITE(HPMD3, val);
- case 3:
- return I2C_PSE_WRITE(HPMD4, val);
- default:
- return EC_ERROR_INVAL;
- }
-}
-
-/*
- * Port 1: 100W
- * Port 2-4: 15W
- */
-static int pse_port_hpmd[4] = {
- LTC4291_HPMD_MAX,
- LTC4291_HPMD_MIN,
- LTC4291_HPMD_MIN,
- LTC4291_HPMD_MIN,
-};
-
-static int pse_port_enable(int port)
-{
- /* Enable detection and classification */
- return I2C_PSE_WRITE(DETPB, LTC4291_DETPB_EN_PORT(port));
-}
-
-static int pse_port_disable(int port)
-{
- /* Request power off (this also disables detection/classification) */
- return I2C_PSE_WRITE(PWRPB, LTC4291_PWRPB_OFF_PORT(port));
-}
-
-static int pse_init_worker(void)
-{
- timestamp_t deadline;
- int err, id, devid, statpin, port;
-
- /* Ignore errors -- may already be resetting */
- I2C_PSE_WRITE(RSTPB, LTC4291_FLD_RSTPB_RSTALL);
-
- deadline.val = get_time().val + LTC4291_RESET_DELAY_US;
- while ((err = I2C_PSE_READ(ID, &id)) != 0) {
- if (timestamp_expired(deadline, NULL))
- return err;
- }
-
- err = I2C_PSE_READ(DEVID, &devid);
- if (err != 0)
- return err;
-
- if (id != LTC4291_ID || devid != LTC4291_DEVID)
- return EC_ERROR_INVAL;
-
- err = I2C_PSE_READ(STATPIN, &statpin);
- if (err != 0)
- return err;
-
- /*
- * We don't want to supply power until we've had a chance to set the
- * limits.
- */
- if (statpin & LTC4291_FLD_STATPIN_AUTO)
- CPRINTS("WARN: PSE reset in AUTO mode");
-
- err = I2C_PSE_WRITE(OPMD, LTC4291_OPMD_AUTO);
- if (err != 0)
- return err;
-
- /* Set maximum power each port is allowed to allocate. */
- for (port = 0; port < LTC4291_PORT_MAX; port++) {
- err = pse_write_hpmd(port, pse_port_hpmd[port]);
- if (err != 0)
- return err;
- }
-
- err = I2C_PSE_WRITE(DISENA, LTC4291_DISENA_ALL);
- if (err != 0)
- return err;
-
- err = I2C_PSE_WRITE(DETENA, LTC4291_DETENA_ALL);
- if (err != 0)
- return err;
-
- return 0;
-}
-
-static void pse_init(void)
-{
- int err;
-
- err = pse_init_worker();
- if (err != 0)
- CPRINTS("PSE init failed: %d", err);
- else
- CPRINTS("PSE init done");
-}
-DECLARE_HOOK(HOOK_CHIPSET_RESUME, pse_init, HOOK_PRIO_DEFAULT);
-
-/* Also reset the PSE on a reboot to toggle the power. */
-DECLARE_HOOK(HOOK_CHIPSET_RESET, pse_init, HOOK_PRIO_DEFAULT);
-
-static int command_pse(int argc, char **argv)
-{
- int port;
-
- /*
- * TODO(b/156399232): endeavour: PSE controller reset by PLTRST
- *
- * Initialization does not reliably work after reset because the device
- * is held in reset by the AP. Running this command after boot finishes
- * always succeeds. Remove once the reset signal changes.
- */
- if (!strncmp(argv[1], "init", 4))
- return pse_init_worker();
-
- if (argc != 3)
- return EC_ERROR_PARAM_COUNT;
-
- port = atoi(argv[1]);
- if (port < 0 || port >= LTC4291_PORT_MAX)
- return EC_ERROR_PARAM1;
-
- if (!strncmp(argv[2], "off", 3))
- return pse_port_disable(port);
- else if (!strncmp(argv[2], "on", 2))
- return pse_port_enable(port);
- else if (!strncmp(argv[2], "min", 3))
- return pse_write_hpmd(port, LTC4291_HPMD_MIN);
- else if (!strncmp(argv[2], "max", 3))
- return pse_write_hpmd(port, LTC4291_HPMD_MAX);
- else
- return EC_ERROR_PARAM2;
-}
-DECLARE_CONSOLE_COMMAND(pse, command_pse,
- "<port# 0-3> <off | on | min | max>",
- "Set PSE port power");
-
-static int ec_command_pse_status(int port, uint8_t *status)
-{
- int detena, statpwr;
- int err;
-
- err = I2C_PSE_READ(DETENA, &detena);
- if (err != 0)
- return err;
-
- err = I2C_PSE_READ(STATPWR, &statpwr);
- if (err != 0)
- return err;
-
- if ((detena & LTC4291_DETENA_EN_PORT(port)) == 0)
- *status = EC_PSE_STATUS_DISABLED;
- else if ((statpwr & LTC4291_STATPWR_ON_PORT(port)) == 0)
- *status = EC_PSE_STATUS_ENABLED;
- else
- *status = EC_PSE_STATUS_POWERED;
-
- return 0;
-}
-
-static enum ec_status ec_command_pse(struct host_cmd_handler_args *args)
-{
- const struct ec_params_pse *p = args->params;
- int err = 0;
-
- if (p->port >= LTC4291_PORT_MAX)
- return EC_RES_INVALID_PARAM;
-
- switch (p->cmd) {
- case EC_PSE_STATUS: {
- struct ec_response_pse_status *r = args->response;
-
- args->response_size = sizeof(*r);
- err = ec_command_pse_status(p->port, &r->status);
- break;
- }
- case EC_PSE_ENABLE:
- err = pse_port_enable(p->port);
- break;
- case EC_PSE_DISABLE:
- err = pse_port_disable(p->port);
- break;
- default:
- return EC_RES_INVALID_PARAM;
- }
-
- if (err)
- return EC_RES_ERROR;
-
- return EC_RES_SUCCESS;
-}
-DECLARE_HOST_COMMAND(EC_CMD_PSE, ec_command_pse, EC_VER_MASK(0));