diff options
| author | Duncan Laurie <dlaurie@google.com> | 2017-07-21 01:10:48 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-07-23 03:16:55 -0700 |
| commit | d7f7f6931766472fab94726e82dc9b172f9c10a5 (patch) | |
| tree | 4f0afa5f76ef64759f250c29e2c1f07cfeecbc0b /board/eve/gpio.inc | |
| parent | 192be4327fac83f10b754ef69f25fdcdf574cec5 (diff) | |
| download | chrome-ec-d7f7f6931766472fab94726e82dc9b172f9c10a5.tar.gz | |
eve: PROCHOT behavior fixes
1) Don't assert prochot by default, this signal has an inverter
and driving it high is asserting prochot until it gets deasserted
during S3->S0 transition.
2) Clear PMIC power source interrupts in pmic_init in case they
were inadvertently set by misbehaving PMIC. The BATTSHORT event
that matters for PROCHOT assertion is masked so it should never
be set anyway, but I found a system where it was set. This register
does not seem to get cleared by an LDO reset so PROCHOT was stuck on
until battery cutoff.
BUG=b:63913242
BRANCH=eve
TEST=manual testing on Eve unit
Change-Id: I5c7f7ca528160972f65bd714deea98357fa43a53
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://chromium-review.googlesource.com/579904
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Diffstat (limited to 'board/eve/gpio.inc')
| -rw-r--r-- | board/eve/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/eve/gpio.inc b/board/eve/gpio.inc index c57e1ee250..7248d7d14d 100644 --- a/board/eve/gpio.inc +++ b/board/eve/gpio.inc @@ -44,7 +44,7 @@ GPIO(TRACKPAD_SHDN_L, PIN(3, 2), GPIO_OUT_LOW) /* Enable Trackpad */ GPIO(WLAN_OFF_L, PIN(7, 2), GPIO_OUT_LOW) /* Disable WLAN */ GPIO(PP3300_DX_WLAN, PIN(A, 7), GPIO_OUT_LOW) /* Enable WLAN 3.3V Power */ GPIO(CHARGER_RST_ODL, PIN(0, 1), GPIO_ODR_HIGH) /* CHARGER_RST_ODL */ -GPIO(CPU_PROCHOT, PIN(8, 1), GPIO_OUT_HIGH) /* PROCHOT# to SOC */ +GPIO(CPU_PROCHOT, PIN(8, 1), GPIO_OUT_LOW) /* PROCHOT to SOC */ GPIO(PCH_ACOK, PIN(5, 0), GPIO_ODR_LOW) /* ACOK to SOC */ GPIO(PCH_WAKE_L, PIN(A, 3), GPIO_ODR_HIGH) /* Wake SOC */ GPIO(PCH_RSMRST_L, PIN(7, 0), GPIO_OUT_LOW) /* RSMRST# to SOC */ |